Datasheet LTC2265-12, LTC2264-12, LTC2263-12 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | 12-Bit, 65Msps Low Power Dual ADCs |
| Pages / Page | 34 / 3 — CONVERTER CHARACTERISTICS. The. denotes the specifications which apply … |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
CONVERTER CHARACTERISTICS. The. denotes the specifications which apply over the full operating
Model Line for this Datasheet
- LTC2263CUJ-12#PBF LTC2263CUJ-12#PBF LTC2263CUJ-12#TRPBF LTC2263CUJ-12#TRPBF LTC2263IUJ-12#PBF LTC2263IUJ-12#PBF LTC2263IUJ-12#TRPBF LTC2263IUJ-12#TRPBF
Text Version of Document
LTC2265-12/ LTC2264-12/LTC2263-12
CONVERTER CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) LTC2265-12 LTC2264-12 LTC2263-12 PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
Resolution (No Missing Codes) l 12 12 12 Bits Integral Linearity Error Differential Analog Input (Note 6) l –1 ±0.3 1 –1 ±0.3 1 –1 ±0.3 1 LSB Differential Linearity Error Differential Analog Input l –0.5 ±0.1 0.5 –0.4 ±0.1 0.4 –0.5 ±0.1 0.5 LSB Offset Error (Note 7) l –12 ±3 12 –12 ±3 12 –12 ±3 12 mV Gain Error Internal Reference –0.8 –0.8 –0.8 %FS External Reference l –2.4 –0.8 0.6 –2.4 –0.8 0.6 –2.4 –0.8 0.6 %FS Offset Drift ±20 ±20 ±20 µV/°C Full-Scale Drift Internal Reference ±30 ±30 ±30 ppm/°C External Reference ±10 ±10 ±10 ppm/°C Gain Matching External Reference ±0.2 ±0.2 ±0.2 %FS Offset Matching ±3 ±3 ±3 mV Transition Noise External Reference 0.32 0.32 0.32 LSBRMS
ANALOG INPUT The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V + – IN Analog Input Range (AIN – AIN ) 1.7V < VDD < 1.9V l 1 to 2 VP-P V + – IN(CM) Analog Input Common Mode (AIN + AIN )/2 Differential Analog Input (Note 8) l VCM – 100mV VCM VCM + 100mV V VSENSE External Voltage Reference Applied to SENSE External Reference Mode l 0.625 1.250 1.300 V IINCM Analog Input Common Mode Current Per Pin, 65Msps 81 µA Per Pin, 40Msps 50 µA Per Pin, 25Msps 31 µA I + – IN1 Analog Input Leakage Current (No Encode) 0 < AIN , AIN < VDD l –1 1 µA IIN2 PAR/SER Input Leakage Current 0 < PAR/SER < VDD l –3 3 µA IIN3 SENSE Input Leakage Current 0.625 < SENSE < 1.3V l –6 6 µA tAP Sample-and-Hold Acquisition Delay Time 0 ns tJITTER Sample-and-Hold Acquisition Delay Jitter 0.15 psRMS CMRR Analog Input Common Mode Rejection Ratio 80 dB BW-3B Full-Power Bandwidth Figure 6 Test Circuit 800 MHz 22654312fb 3 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts
CONVERTER CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) LTC2265-12 LTC2264-12 LTC2263-12 PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
Resolution (No Missing Codes) l 12 12 12 Bits Integral Linearity Error Differential Analog Input (Note 6) l –1 ±0.3 1 –1 ±0.3 1 –1 ±0.3 1 LSB Differential Linearity Error Differential Analog Input l –0.5 ±0.1 0.5 –0.4 ±0.1 0.4 –0.5 ±0.1 0.5 LSB Offset Error (Note 7) l –12 ±3 12 –12 ±3 12 –12 ±3 12 mV Gain Error Internal Reference –0.8 –0.8 –0.8 %FS External Reference l –2.4 –0.8 0.6 –2.4 –0.8 0.6 –2.4 –0.8 0.6 %FS Offset Drift ±20 ±20 ±20 µV/°C Full-Scale Drift Internal Reference ±30 ±30 ±30 ppm/°C External Reference ±10 ±10 ±10 ppm/°C Gain Matching External Reference ±0.2 ±0.2 ±0.2 %FS Offset Matching ±3 ±3 ±3 mV Transition Noise External Reference 0.32 0.32 0.32 LSBRMS
ANALOG INPUT The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V + – IN Analog Input Range (AIN – AIN ) 1.7V < VDD < 1.9V l 1 to 2 VP-P V + – IN(CM) Analog Input Common Mode (AIN + AIN )/2 Differential Analog Input (Note 8) l VCM – 100mV VCM VCM + 100mV V VSENSE External Voltage Reference Applied to SENSE External Reference Mode l 0.625 1.250 1.300 V IINCM Analog Input Common Mode Current Per Pin, 65Msps 81 µA Per Pin, 40Msps 50 µA Per Pin, 25Msps 31 µA I + – IN1 Analog Input Leakage Current (No Encode) 0 < AIN , AIN < VDD l –1 1 µA IIN2 PAR/SER Input Leakage Current 0 < PAR/SER < VDD l –3 3 µA IIN3 SENSE Input Leakage Current 0.625 < SENSE < 1.3V l –6 6 µA tAP Sample-and-Hold Acquisition Delay Time 0 ns tJITTER Sample-and-Hold Acquisition Delay Jitter 0.15 psRMS CMRR Analog Input Common Mode Rejection Ratio 80 dB BW-3B Full-Power Bandwidth Figure 6 Test Circuit 800 MHz 22654312fb 3 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts
