Datasheet ADAQ7980, ADAQ7988 (Analog Devices) - 2
| Manufacturer | Analog Devices |
| Description | 16-bit, 500 kSPS, μModule Data Acquisition System |
| Pages / Page | 49 / 2 — ADAQ7980/ADAQ7988. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY … |
| Revision | A |
| File Format / Size | PDF / 1.0 Mb |
| Document Language | English |
ADAQ7980/ADAQ7988. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 8/2017—Rev. 0 to Rev. A. 3/2017—Revision 0: Initial Version
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ADAQ7980/ADAQ7988 Data Sheet TABLE OF CONTENTS
Features .. 1 Slew Enhancement ... 33 Applications ... 1 Effect of Feedback Resistor on Frequency Response .. 33 General Description ... 1 Voltage Reference Input .. 33 Functional Block Diagram .. 1 Power Supply ... 35 Revision History ... 2 LDO Regulator Current-Limit and Thermal Overload Specifications ... 3 Protection .. 36 Dual-Supply Configuration .. 3 LDO Regulator Thermal Considerations ... 36 Single-Supply Configuration .. 7 Digital Interface .. 37 Timing Specifications .. 11 3-Wire CS Mode Without the Busy Indicator .. 38 Absolute Maximum Ratings .. 13 3-Wire CS Mode with the Busy Indicator ... 39 Thermal Data .. 13 4-Wire CS Mode Without the Busy Indicator .. 40 Thermal Resistance .. 13 4-Wire CS Mode with the Busy Indicator ... 41 ESD Caution .. 13 Chain Mode Without the Busy Indicator.. 42 Pin Configuration and Function Descriptions ... 15 Chain Mode with the Busy Indicator .. 43 Typical Performance Characteristics ... 17 Application Circuits ... 44 Terminology .. 25 Nonunity Gain Configurations .. 45 Theory of Operation .. 26 Inverting Configuration with Level Shift .. 46 Circuit Information .. 26 Using the ADAQ7980/ADAQ7988 With Active Filters .. 47 Converter Operation .. 26 Applications Information .. 48 Typical Connection Diagram.. 27 Layout .. 48 ADC Driver Input .. 28 Evaluating the Performance of the ADAQ7980/ADAQ7988 ... 48 Input Protection .. 28 Outline Dimensions ... 49 Noise Considerations And Signal Settling .. 28 Ordering Guide .. 49 PD_AMP Operation .. 31 Dynamic Power Scaling (DPS) ... 31
REVISION HISTORY 8/2017—Rev. 0 to Rev. A
Change to 0.1 Hz to 10 Hz Voltage Noise Parameter Heading, Changed Integrated Data Acquisition System to μModule, Table 4 ... 8 Subsystem to μModule Data Acquisition System, Subsystems to Changes to Human Body Model (HBM) Parameter and μModule Data Acquisition Systems, and DAQ Subsystem to Endnote 4, Table 7 .. 14 μModule Data Acquisition System .. Throughout Change to Figure 27 Caption .. 21 Changes to Features Section and Table 1 Title ... 1 Changes to Circuit Information Section ... 27 Moved General Description Section .. 3 Change to Table 15 Title .. 45 Changes to General Description Section .. 3
Change to 0.1 Hz to 10 Hz Voltage Noise Parameter Heading,
3/2017—Revision 0: Initial Version
Table 2 .. 4 Rev. A | Page 2 of 49 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL-SUPPLY CONFIGURATION SINGLE-SUPPLY CONFIGURATION TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ADC DRIVER INPUT INPUT PROTECTION NOISE CONSIDERATIONS AND SIGNAL SETTLING OPERATION DYNAMIC POWER SCALING (DPS) SLEW ENHANCEMENT EFFECT OF FEEDBACK RESISTOR ON FREQUENCY RESPONSE VOLTAGE REFERENCE INPUT POWER SUPPLY LDO REGULATOR CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION LDO REGULATOR THERMAL CONSIDERATIONS DIGITAL INTERFACE 3-WIRE MODE WITHOUT THE BUSY INDICATOR 3-WIRE MODE WITH THE BUSY INDICATOR 4-WIRE MODE WITHOUT THE BUSY INDICATOR 4-WIRE MODE WITH THE BUSY INDICATOR CHAIN MODE WITHOUT THE BUSY INDICATOR CHAIN MODE WITH THE BUSY INDICATOR APPLICATION CIRCUITS NONUNITY GAIN CONFIGURATIONS INVERTING CONFIGURATION WITH LEVEL SHIFT USING THE ADAQ7980/ADAQ7988 WITH ACTIVE FILTERS APPLICATIONS INFORMATION LAYOUT EVALUATING THE PERFORMANCE OF THE ADAQ7980/ADAQ7988 OUTLINE DIMENSIONS ORDERING GUIDE
ADAQ7980/ADAQ7988 Data Sheet TABLE OF CONTENTS
Features .. 1 Slew Enhancement ... 33 Applications ... 1 Effect of Feedback Resistor on Frequency Response .. 33 General Description ... 1 Voltage Reference Input .. 33 Functional Block Diagram .. 1 Power Supply ... 35 Revision History ... 2 LDO Regulator Current-Limit and Thermal Overload Specifications ... 3 Protection .. 36 Dual-Supply Configuration .. 3 LDO Regulator Thermal Considerations ... 36 Single-Supply Configuration .. 7 Digital Interface .. 37 Timing Specifications .. 11 3-Wire CS Mode Without the Busy Indicator .. 38 Absolute Maximum Ratings .. 13 3-Wire CS Mode with the Busy Indicator ... 39 Thermal Data .. 13 4-Wire CS Mode Without the Busy Indicator .. 40 Thermal Resistance .. 13 4-Wire CS Mode with the Busy Indicator ... 41 ESD Caution .. 13 Chain Mode Without the Busy Indicator.. 42 Pin Configuration and Function Descriptions ... 15 Chain Mode with the Busy Indicator .. 43 Typical Performance Characteristics ... 17 Application Circuits ... 44 Terminology .. 25 Nonunity Gain Configurations .. 45 Theory of Operation .. 26 Inverting Configuration with Level Shift .. 46 Circuit Information .. 26 Using the ADAQ7980/ADAQ7988 With Active Filters .. 47 Converter Operation .. 26 Applications Information .. 48 Typical Connection Diagram.. 27 Layout .. 48 ADC Driver Input .. 28 Evaluating the Performance of the ADAQ7980/ADAQ7988 ... 48 Input Protection .. 28 Outline Dimensions ... 49 Noise Considerations And Signal Settling .. 28 Ordering Guide .. 49 PD_AMP Operation .. 31 Dynamic Power Scaling (DPS) ... 31
REVISION HISTORY 8/2017—Rev. 0 to Rev. A
Change to 0.1 Hz to 10 Hz Voltage Noise Parameter Heading, Changed Integrated Data Acquisition System to μModule, Table 4 ... 8 Subsystem to μModule Data Acquisition System, Subsystems to Changes to Human Body Model (HBM) Parameter and μModule Data Acquisition Systems, and DAQ Subsystem to Endnote 4, Table 7 .. 14 μModule Data Acquisition System .. Throughout Change to Figure 27 Caption .. 21 Changes to Features Section and Table 1 Title ... 1 Changes to Circuit Information Section ... 27 Moved General Description Section .. 3 Change to Table 15 Title .. 45 Changes to General Description Section .. 3
Change to 0.1 Hz to 10 Hz Voltage Noise Parameter Heading,
3/2017—Revision 0: Initial Version
Table 2 .. 4 Rev. A | Page 2 of 49 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL-SUPPLY CONFIGURATION SINGLE-SUPPLY CONFIGURATION TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ADC DRIVER INPUT INPUT PROTECTION NOISE CONSIDERATIONS AND SIGNAL SETTLING OPERATION DYNAMIC POWER SCALING (DPS) SLEW ENHANCEMENT EFFECT OF FEEDBACK RESISTOR ON FREQUENCY RESPONSE VOLTAGE REFERENCE INPUT POWER SUPPLY LDO REGULATOR CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION LDO REGULATOR THERMAL CONSIDERATIONS DIGITAL INTERFACE 3-WIRE MODE WITHOUT THE BUSY INDICATOR 3-WIRE MODE WITH THE BUSY INDICATOR 4-WIRE MODE WITHOUT THE BUSY INDICATOR 4-WIRE MODE WITH THE BUSY INDICATOR CHAIN MODE WITHOUT THE BUSY INDICATOR CHAIN MODE WITH THE BUSY INDICATOR APPLICATION CIRCUITS NONUNITY GAIN CONFIGURATIONS INVERTING CONFIGURATION WITH LEVEL SHIFT USING THE ADAQ7980/ADAQ7988 WITH ACTIVE FILTERS APPLICATIONS INFORMATION LAYOUT EVALUATING THE PERFORMANCE OF THE ADAQ7980/ADAQ7988 OUTLINE DIMENSIONS ORDERING GUIDE
