Datasheet AD7192 (Analog Devices) - 2
| Manufacturer | Analog Devices |
| Description | 4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA |
| Pages / Page | 41 / 2 — AD7192* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017. … |
| Revision | A |
| File Format / Size | PDF / 566 Kb |
| Document Language | English |
AD7192* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017. COMPARABLE PARTS. REFERENCE DESIGNS. EVALUATION KITS
Model Line for this Datasheet
Text Version of Document
AD7192* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017 COMPARABLE PARTS REFERENCE DESIGNS
View a parametric search of comparable parts. • CN0119 • CN0251
EVALUATION KITS
• CN0371 • AD7192 Evaluation Board
REFERENCE MATERIALS DOCUMENTATION Solutions Bulletins & Brochures Application Notes
• Test & Instrumentation Solutions Bulletin, Volume 10, • AN-0979: Digital Filtering Options: AD7190, AD7192 Issue 3 • AN-1069: Zero Latency for the AD7190, AD7192, AD7193,
Technical Articles
AD7194, and AD7195 • High-resolution ADCs — an overview • AN-1084: Channel Switching: AD7190, AD7192, AD7193,
Tutorials
AD7194, AD7195 • Tutorial on Technical and Performance Benefits of AD719x • AN-1131: Chopping on the AD7190, AD7192, AD7193, Family AD7194, and AD7195 • AN-1186: Radiated Immunity Performance of the AD7192
DESIGN RESOURCES
in Weigh Scale Applications • AD7192 Material Declaration
Data Sheet
• PCN-PDN Information • AD7192: 4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA Data Sheet • Quality And Reliability
User Guides
• Symbols and Footprints • UG-222: Evaluation Board for the AD7190/AD7192 4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADCs
DISCUSSIONS
View all AD7192 EngineerZone Discussions.
SOFTWARE AND SYSTEMS REQUIREMENTS
• AD7190 - Microcontroller No-OS Driver
SAMPLE AND BUY
• AD7192 IIO High Precision ADC Linux Driver Visit the product page to see pricing options.
TOOLS AND SIMULATIONS TECHNICAL SUPPORT
• AD7190/AD7192 Digital Filter Models Submit a technical question or find your regional support number. • Download the Active Functional Model to evaluate and debug AD719x
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
Document Outline FEATURES INTERFACE APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS CIRCUIT AND TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS RMS NOISE AND RESOLUTION SINC4 CHOP DISABLED SINC3 CHOP DISABLED SINC4 CHOP ENABLED SINC3 CHOP ENABLED ON-CHIP REGISTERS COMMUNICATIONS REGISTER STATUS REGISTER MODE REGISTER CONFIGURATION REGISTER DATA REGISTER ID REGISTER GPOCON REGISTER OFFSET REGISTER FULL-SCALE REGISTER ADC CIRCUIT INFORMATION OVERVIEW FILTER, OUTPUT DATA RATE, AND SETTLING TIME Chop Disabled Chop Enabled 50 Hz/60Hz Rejection Zero Latency Channel Sequencer Single Conversion Mode Continuous Conversion Mode Continuous Read CIRCUIT DESCRIPTION ANALOG INPUT CHANNEL PROGRAMMABLE GAIN ARRAY (PGA) BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING CLOCK BURNOUT CURRENTS REFERENCE REFERENCE DETECT RESET SYSTEM SYNCHRONIZATION TEMPERATURE SENSOR BRIDGE POWER-DOWN SWITCH LOGIC OUTPUTS ENABLE PARITY CALIBRATION GROUNDING AND LAYOUT APPLICATIONS INFORMATION WEIGH SCALES OUTLINE DIMENSIONS ORDERING GUIDE
View a parametric search of comparable parts. • CN0119 • CN0251
EVALUATION KITS
• CN0371 • AD7192 Evaluation Board
REFERENCE MATERIALS DOCUMENTATION Solutions Bulletins & Brochures Application Notes
• Test & Instrumentation Solutions Bulletin, Volume 10, • AN-0979: Digital Filtering Options: AD7190, AD7192 Issue 3 • AN-1069: Zero Latency for the AD7190, AD7192, AD7193,
Technical Articles
AD7194, and AD7195 • High-resolution ADCs — an overview • AN-1084: Channel Switching: AD7190, AD7192, AD7193,
Tutorials
AD7194, AD7195 • Tutorial on Technical and Performance Benefits of AD719x • AN-1131: Chopping on the AD7190, AD7192, AD7193, Family AD7194, and AD7195 • AN-1186: Radiated Immunity Performance of the AD7192
DESIGN RESOURCES
in Weigh Scale Applications • AD7192 Material Declaration
Data Sheet
• PCN-PDN Information • AD7192: 4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA Data Sheet • Quality And Reliability
User Guides
• Symbols and Footprints • UG-222: Evaluation Board for the AD7190/AD7192 4.8 kHz Ultralow Noise 24-Bit Sigma-Delta ADCs
DISCUSSIONS
View all AD7192 EngineerZone Discussions.
SOFTWARE AND SYSTEMS REQUIREMENTS
• AD7190 - Microcontroller No-OS Driver
SAMPLE AND BUY
• AD7192 IIO High Precision ADC Linux Driver Visit the product page to see pricing options.
TOOLS AND SIMULATIONS TECHNICAL SUPPORT
• AD7190/AD7192 Digital Filter Models Submit a technical question or find your regional support number. • Download the Active Functional Model to evaluate and debug AD719x
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
Document Outline FEATURES INTERFACE APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS CIRCUIT AND TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS RMS NOISE AND RESOLUTION SINC4 CHOP DISABLED SINC3 CHOP DISABLED SINC4 CHOP ENABLED SINC3 CHOP ENABLED ON-CHIP REGISTERS COMMUNICATIONS REGISTER STATUS REGISTER MODE REGISTER CONFIGURATION REGISTER DATA REGISTER ID REGISTER GPOCON REGISTER OFFSET REGISTER FULL-SCALE REGISTER ADC CIRCUIT INFORMATION OVERVIEW FILTER, OUTPUT DATA RATE, AND SETTLING TIME Chop Disabled Chop Enabled 50 Hz/60Hz Rejection Zero Latency Channel Sequencer Single Conversion Mode Continuous Conversion Mode Continuous Read CIRCUIT DESCRIPTION ANALOG INPUT CHANNEL PROGRAMMABLE GAIN ARRAY (PGA) BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING CLOCK BURNOUT CURRENTS REFERENCE REFERENCE DETECT RESET SYSTEM SYNCHRONIZATION TEMPERATURE SENSOR BRIDGE POWER-DOWN SWITCH LOGIC OUTPUTS ENABLE PARITY CALIBRATION GROUNDING AND LAYOUT APPLICATIONS INFORMATION WEIGH SCALES OUTLINE DIMENSIONS ORDERING GUIDE
