Datasheet LTC1293, LTC1294, LTC1296 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | Single Chip 12-Bit Data Acquisition System |
| Pages / Page | 28 / 7 — PI FU CTIO S. LTC1293. PIN. FUNCTION. DESCRIPTION. LTC1294. LTC1296 |
| File Format / Size | PDF / 398 Kb |
| Document Language | English |
PI FU CTIO S. LTC1293. PIN. FUNCTION. DESCRIPTION. LTC1294. LTC1296
Model Line for this Datasheet
- LTC1293BCN#PBF LTC1293BCN#PBF LTC1293BCSW#PBF LTC1293BCSW#PBF LTC1293BCSW#TRPBF LTC1293BCSW#TRPBF LTC1293CCN#PBF LTC1293CCN#PBF LTC1293CCSW#PBF LTC1293CCSW#PBF LTC1293CCSW#TRPBF LTC1293CCSW#TRPBF LTC1293DCN#PBF LTC1293DCN#PBF LTC1293DCSW#PBF LTC1293DCSW#PBF LTC1293DCSW#TRPBF LTC1293DCSW#TRPBF
- LTC1294BCN#PBF LTC1294BCN#PBF LTC1294BCSW#PBF LTC1294BCSW#PBF LTC1294BCSW#TRPBF LTC1294BCSW#TRPBF LTC1294CCN#PBF LTC1294CCN#PBF LTC1294CCSW#PBF LTC1294CCSW#PBF LTC1294CCSW#TRPBF LTC1294CCSW#TRPBF LTC1294DCN#PBF LTC1294DCN#PBF LTC1294DCSW#PBF LTC1294DCSW#PBF LTC1294DCSW#TRPBF LTC1294DCSW#TRPBF
- LTC1296BCN#PBF LTC1296BCN#PBF LTC1296BCSW#PBF LTC1296BCSW#PBF LTC1296BCSW#TRPBF LTC1296BCSW#TRPBF LTC1296BIN#PBF LTC1296BIN#PBF LTC1296BISW#PBF LTC1296BISW#PBF LTC1296BISW#TRPBF LTC1296BISW#TRPBF LTC1296CCN#PBF LTC1296CCN#PBF LTC1296CCSW#PBF LTC1296CCSW#PBF LTC1296CCSW#TRPBF LTC1296CCSW#TRPBF LTC1296CIN#PBF LTC1296CIN#PBF LTC1296CISW#PBF LTC1296CISW#PBF LTC1296CISW#TRPBF LTC1296CISW#TRPBF LTC1296DCN#PBF LTC1296DCN#PBF LTC1296DCSW#PBF LTC1296DCSW#PBF LTC1296DCSW#TRPBF LTC1296DCSW#TRPBF LTC1296DIN#PBF LTC1296DIN#PBF LTC1296DISW#PBF LTC1296DISW#PBF LTC1296DISW#TRPBF LTC1296DISW#TRPBF
Text Version of Document
LTC1293/LTC1294/LTC1296
U U U PI FU CTIO S LTC1293 # PIN FUNCTION DESCRIPTION
1 – 6 CH0 – CH5 Analog Inputs The analog inputs must be free of noise with respect to AGND. 7 COM Common The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is usually tied to the analog ground plane. 8 DGND Digital Ground This is the ground for the internal logic. Tie to the ground plane. 9 V– Negative Supply Tie V– to most negative potential in the circuit (Ground in single supply applications). 10 AGND Analog Ground AGND should be tied directly to the analog ground plane. 11 VREF Ref. Input The reference inputs must be kept free of noise with respect to AGND. 12 DIN Data Input The A/D configuration word is shifted into this input. 13 DOUT Digital Data Output The A/D conversion result is shifted out of this output. 14 CS Chip Select Input A logic low on this input enables data transfer. 15 CLK Clock This clock synchronizes the serial data transfer and controls A/D conversion rate. 16 VCC Positive supply This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane.
LTC1294 # PIN FUNCTION DESCRIPTION
1 –8 CH0 – CH7 Analog Inputs The analog inputs must be free of noise with respect to AGND. 9 COM Common The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is usually tied to the analog ground plane. 10 DGND Digital Ground This is the ground for the internal logic. Tie to the ground plane. 11 V– Negative Supply Tie V– to most negative potential in the circuit (Ground in single supply applications). 12 AGND Analog Ground AGND should be tied directly to the analog ground plane. 13, 14 REF–, REF+ Ref. Inputs The reference inputs must be kept free of noise with respect to AGND. The A/D sees a reference voltage equal to the difference between REF+ and REF–. 15 DIN Data Input The A/D configuration word is shifted into this input. 16 DOUT Digital Data Output The A/D conversion result is shifted out of this output. 17 CS Chip Select Input A logic low on this input enables data transfer. 18 CLK Clock This clock synchronizes the serial data transfer and controls A/D converion rate. 19, 20 AVCC, DVCC Positive Supplies These supplies must be kept free of noise and ripple by bypassing directly to the analog ground plane. AVCC and DVCC must be tied together.
LTC1296 # PIN FUNCTION DESCRIPTION
1 –8 CH0 – CH7 Analog Inputs The analog inputs must be free of noise with respect to AGND. 9 COM Common The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is usually tied to the analog ground plane. 10 DGND Digital Ground This is the ground for the internal logic. Tie to the ground plane. 11 V– Negative Supply Tie V– to most negative potential in the circuit (Ground in single supply applications). 12 AGND Analog Ground AGND should be tied directly to the analog ground plane. 13, 14 REF–, REF+ Ref. Inputs The reference inputs must be kept free of noise with respect to AGND. The A/D sees a reference voltage equal to the difference between REF+ and REF–. 15 DIN Data Input The A/D configuration word is shifted into this input. 16 DOUT Digital Data Output The A/D conversion result is shifted out of this output. 17 CS Chip Select Input A logic low on this input enables data transfer. 18 CLK Clock This clock synchronizes the serial data transfer and controls A/D conversion rate. 19 SSO System Shutdown System Shutdown Output pin will go low when power shutdown is requested. Output 20 VCC Positive Supply This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane. 129346fs 7
U U U PI FU CTIO S LTC1293 # PIN FUNCTION DESCRIPTION
1 – 6 CH0 – CH5 Analog Inputs The analog inputs must be free of noise with respect to AGND. 7 COM Common The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is usually tied to the analog ground plane. 8 DGND Digital Ground This is the ground for the internal logic. Tie to the ground plane. 9 V– Negative Supply Tie V– to most negative potential in the circuit (Ground in single supply applications). 10 AGND Analog Ground AGND should be tied directly to the analog ground plane. 11 VREF Ref. Input The reference inputs must be kept free of noise with respect to AGND. 12 DIN Data Input The A/D configuration word is shifted into this input. 13 DOUT Digital Data Output The A/D conversion result is shifted out of this output. 14 CS Chip Select Input A logic low on this input enables data transfer. 15 CLK Clock This clock synchronizes the serial data transfer and controls A/D conversion rate. 16 VCC Positive supply This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane.
LTC1294 # PIN FUNCTION DESCRIPTION
1 –8 CH0 – CH7 Analog Inputs The analog inputs must be free of noise with respect to AGND. 9 COM Common The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is usually tied to the analog ground plane. 10 DGND Digital Ground This is the ground for the internal logic. Tie to the ground plane. 11 V– Negative Supply Tie V– to most negative potential in the circuit (Ground in single supply applications). 12 AGND Analog Ground AGND should be tied directly to the analog ground plane. 13, 14 REF–, REF+ Ref. Inputs The reference inputs must be kept free of noise with respect to AGND. The A/D sees a reference voltage equal to the difference between REF+ and REF–. 15 DIN Data Input The A/D configuration word is shifted into this input. 16 DOUT Digital Data Output The A/D conversion result is shifted out of this output. 17 CS Chip Select Input A logic low on this input enables data transfer. 18 CLK Clock This clock synchronizes the serial data transfer and controls A/D converion rate. 19, 20 AVCC, DVCC Positive Supplies These supplies must be kept free of noise and ripple by bypassing directly to the analog ground plane. AVCC and DVCC must be tied together.
LTC1296 # PIN FUNCTION DESCRIPTION
1 –8 CH0 – CH7 Analog Inputs The analog inputs must be free of noise with respect to AGND. 9 COM Common The common pin defines the zero reference point for all single ended inputs. It must be free of noise and is usually tied to the analog ground plane. 10 DGND Digital Ground This is the ground for the internal logic. Tie to the ground plane. 11 V– Negative Supply Tie V– to most negative potential in the circuit (Ground in single supply applications). 12 AGND Analog Ground AGND should be tied directly to the analog ground plane. 13, 14 REF–, REF+ Ref. Inputs The reference inputs must be kept free of noise with respect to AGND. The A/D sees a reference voltage equal to the difference between REF+ and REF–. 15 DIN Data Input The A/D configuration word is shifted into this input. 16 DOUT Digital Data Output The A/D conversion result is shifted out of this output. 17 CS Chip Select Input A logic low on this input enables data transfer. 18 CLK Clock This clock synchronizes the serial data transfer and controls A/D conversion rate. 19 SSO System Shutdown System Shutdown Output pin will go low when power shutdown is requested. Output 20 VCC Positive Supply This supply must be kept free of noise and ripple by bypassing directly to the analog ground plane. 129346fs 7
