Datasheet LTC1864L, LTC1865L (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | µPower, 3V, 16-Bit, 150ksps 1- and 2-Channel ADCs in MSOP |
| Pages / Page | 16 / 8 — FUNCTIONAL BLOCK DIAGRA. TEST CIRCUITS. Load Circuit for tdDO, tr, tf, … |
| File Format / Size | PDF / 366 Kb |
| Document Language | English |
FUNCTIONAL BLOCK DIAGRA. TEST CIRCUITS. Load Circuit for tdDO, tr, tf, tdis and ten
Model Line for this Datasheet
- LTC1864LACMS8#PBF LTC1864LACMS8#PBF LTC1864LACMS8#TRPBF LTC1864LACMS8#TRPBF LTC1864LACS8#PBF LTC1864LACS8#PBF LTC1864LACS8#TRPBF LTC1864LACS8#TRPBF LTC1864LAIMS8#PBF LTC1864LAIMS8#PBF LTC1864LAIMS8#TRPBF LTC1864LAIMS8#TRPBF LTC1864LAIS8#PBF LTC1864LAIS8#PBF LTC1864LAIS8#TRPBF LTC1864LAIS8#TRPBF LTC1864LCMS8#PBF LTC1864LCMS8#PBF LTC1864LCMS8#TRPBF LTC1864LCMS8#TRPBF LTC1864LCS8#PBF LTC1864LCS8#PBF LTC1864LCS8#TRPBF LTC1864LCS8#TRPBF LTC1864LIMS8#PBF LTC1864LIMS8#PBF LTC1864LIMS8#TRPBF LTC1864LIMS8#TRPBF LTC1864LIS8#PBF LTC1864LIS8#PBF LTC1864LIS8#TRPBF LTC1864LIS8#TRPBF
- LTC1865LACMS#PBF LTC1865LACMS#PBF LTC1865LACMS#TRPBF LTC1865LACMS#TRPBF LTC1865LACS8#PBF LTC1865LACS8#PBF LTC1865LACS8#TRPBF LTC1865LACS8#TRPBF LTC1865LAIMS#PBF LTC1865LAIMS#PBF LTC1865LAIMS#TRPBF LTC1865LAIMS#TRPBF LTC1865LAIS8#PBF LTC1865LAIS8#PBF LTC1865LAIS8#TRPBF LTC1865LAIS8#TRPBF LTC1865LCMS#PBF LTC1865LCMS#PBF LTC1865LCMS#TRPBF LTC1865LCMS#TRPBF LTC1865LCS8#PBF LTC1865LCS8#PBF LTC1865LCS8#TRPBF LTC1865LCS8#TRPBF LTC1865LIMS#PBF LTC1865LIMS#PBF LTC1865LIMS#TRPBF LTC1865LIMS#TRPBF LTC1865LIS8#PBF LTC1865LIS8#PBF LTC1865LIS8#TRPBF LTC1865LIS8#TRPBF
Text Version of Document
LTC1864L/LTC1865L
U U W FUNCTIONAL BLOCK DIAGRA
VCC CONV (SDI) SCK PIN NAMES IN PARENTHESES REFER TO LTC1865L CONVERT BIAS AND SERIAL SDO CLK SHUTDOWN PORT DATA IN 16 BITS IN+ + (CH0) 16-BIT SAMPLING DATA OUT IN– ADC – (CH1) 1864/65 BD GND VREF
TEST CIRCUITS Load Circuit for tdDO, tr, tf, tdis and ten Voltage Waveforms for SDO Rise and Fall Times, tr, tf
TEST POINT VOH SDO VOL 3k VCC tdis WAVEFORM 2, ten SDO tdis WAVEFORM 1 t 20pF r tf 1864 TC04 1864 TC01
Voltage Waveforms for ten Voltage Waveforms for tdis
CONV CONV VIH SDO 1864 TC03 SDO 90% ten WAVEFORM 1 (SEE NOTE 1) tdis
Voltage Waveforms for SDO Delay Times, tdDO and thDO
SDO WAVEFORM 2 10% (SEE NOTE 2) NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH SCK THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL VIL NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH tdDO THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL t 1864 TC05 hDO VOH SDO VOL 1864 TC02 sn18645L 18645Lfs 8
U U W FUNCTIONAL BLOCK DIAGRA
VCC CONV (SDI) SCK PIN NAMES IN PARENTHESES REFER TO LTC1865L CONVERT BIAS AND SERIAL SDO CLK SHUTDOWN PORT DATA IN 16 BITS IN+ + (CH0) 16-BIT SAMPLING DATA OUT IN– ADC – (CH1) 1864/65 BD GND VREF
TEST CIRCUITS Load Circuit for tdDO, tr, tf, tdis and ten Voltage Waveforms for SDO Rise and Fall Times, tr, tf
TEST POINT VOH SDO VOL 3k VCC tdis WAVEFORM 2, ten SDO tdis WAVEFORM 1 t 20pF r tf 1864 TC04 1864 TC01
Voltage Waveforms for ten Voltage Waveforms for tdis
CONV CONV VIH SDO 1864 TC03 SDO 90% ten WAVEFORM 1 (SEE NOTE 1) tdis
Voltage Waveforms for SDO Delay Times, tdDO and thDO
SDO WAVEFORM 2 10% (SEE NOTE 2) NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH SCK THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL VIL NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH tdDO THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL t 1864 TC05 hDO VOH SDO VOL 1864 TC02 sn18645L 18645Lfs 8
