Datasheet LTC2289 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | Dual 10-Bit, 80Msps Low Noise 3V ADC |
| Pages / Page | 24 / 1 — FEATURES. DESCRIPTIO. Integrated Dual 10-Bit ADCs. Sample Rate: 80Msps. … |
| File Format / Size | PDF / 677 Kb |
| Document Language | English |
FEATURES. DESCRIPTIO. Integrated Dual 10-Bit ADCs. Sample Rate: 80Msps. Single 3V Supply (2.7V to 3.4V). Low Power: 422mW
Model Line for this Datasheet
Text Version of Document
LTC2289 Dual 10-Bit, 80Msps Low Noise 3V ADC
U FEATURES DESCRIPTIO
■
Integrated Dual 10-Bit ADCs
The LTC®2289 is a 10-bit 80Msps, low noise 3V dual A/D ■
Sample Rate: 80Msps
converter designed for digitizing high frequency, wide ■
Single 3V Supply (2.7V to 3.4V)
dynamic range signals. The LTC2289 is perfect for ■
Low Power: 422mW
demanding imaging and communications applications ■
61.6dB SNR at 70MHz Input
with AC performance that includes 61.6dB SNR and 85dB ■
85dB SFDR at 70MHz Input
SFDR for signals well beyond the Nyquist frequency. ■ 110dB Channel Isolation at 100MHz DC specs include ±0.1LSB INL (typ), ±0.1LSB DNL (typ) ■ Multiplexed or Separate Data Bus and ±0.6LSB INL, ±0.5LSB DNL over temperature. The ■ Flexible Input: 1VP-P to 2VP-P Range transition noise is a low 0.08LSB ■ 575MHz Full Power Bandwidth S/H RMS. ■ Clock Duty Cycle Stabilizer A single 3V supply allows low power operation. A separate ■ Shutdown and Nap Modes output supply allows the outputs to drive 0.5V to 3.6V ■ Pin Compatible Family logic. An optional multiplexer allows both channels to 105Msps: LTC2282 (12-Bit), LTC2280 (10-Bit) share a digital output bus. 80Msps: LTC2294 (12-Bit), LTC2289 (10-Bit) A single-ended CLK input controls converter operation. An 65Msps: LTC2293 (12-Bit), LTC2288 (10-Bit) optional clock duty cycle stabilizer allows high perfor- 40Msps: LTC2292 (12-Bit), LTC2287 (10-Bit) mance at full speed for a wide range of clock duty cycles. 25Msps: LTC2291 (12-Bit), LTC2286 (10-Bit) , LTC and LT are registered trademarks of Linear Technology Corporation. ■ 64-Pin (9mm × 9mm) QFN Package All other trademarks are the property of their respective owners.
U APPLICATIO S
■ Wireless and Wired Broadband Communication ■ Imaging Systems ■ Spectral Analysis ■ Portable Instrumentation
U TYPICAL APPLICATIO SNR vs Input Frequency,
+ OVDD
–1dB, 2V Range, 80Msps
10-BIT ANALOG INPUT PIPELINED D9A 65 INPUT A S/H OUTPUT • ADC CORE • DRIVERS • 64 – D0A 63 OGND 62 61 CLK A CLOCK/DUTY CYCLE CONTROL 60 MUX SNR (dBFS) 59 CLK B CLOCK/DUTY CYCLE 58 CONTROL 57 OVDD 56 D9B 55 + OUTPUT • 10-BIT • 0 50 100 150 200 ANALOG • INPUT DRIVERS PIPELINED D0B INPUT FREQUENCY (MHz) INPUT B S/H ADC CORE 2289 TA02 – OGND 2289 TA01 2289fa 1
U FEATURES DESCRIPTIO
■
Integrated Dual 10-Bit ADCs
The LTC®2289 is a 10-bit 80Msps, low noise 3V dual A/D ■
Sample Rate: 80Msps
converter designed for digitizing high frequency, wide ■
Single 3V Supply (2.7V to 3.4V)
dynamic range signals. The LTC2289 is perfect for ■
Low Power: 422mW
demanding imaging and communications applications ■
61.6dB SNR at 70MHz Input
with AC performance that includes 61.6dB SNR and 85dB ■
85dB SFDR at 70MHz Input
SFDR for signals well beyond the Nyquist frequency. ■ 110dB Channel Isolation at 100MHz DC specs include ±0.1LSB INL (typ), ±0.1LSB DNL (typ) ■ Multiplexed or Separate Data Bus and ±0.6LSB INL, ±0.5LSB DNL over temperature. The ■ Flexible Input: 1VP-P to 2VP-P Range transition noise is a low 0.08LSB ■ 575MHz Full Power Bandwidth S/H RMS. ■ Clock Duty Cycle Stabilizer A single 3V supply allows low power operation. A separate ■ Shutdown and Nap Modes output supply allows the outputs to drive 0.5V to 3.6V ■ Pin Compatible Family logic. An optional multiplexer allows both channels to 105Msps: LTC2282 (12-Bit), LTC2280 (10-Bit) share a digital output bus. 80Msps: LTC2294 (12-Bit), LTC2289 (10-Bit) A single-ended CLK input controls converter operation. An 65Msps: LTC2293 (12-Bit), LTC2288 (10-Bit) optional clock duty cycle stabilizer allows high perfor- 40Msps: LTC2292 (12-Bit), LTC2287 (10-Bit) mance at full speed for a wide range of clock duty cycles. 25Msps: LTC2291 (12-Bit), LTC2286 (10-Bit) , LTC and LT are registered trademarks of Linear Technology Corporation. ■ 64-Pin (9mm × 9mm) QFN Package All other trademarks are the property of their respective owners.
U APPLICATIO S
■ Wireless and Wired Broadband Communication ■ Imaging Systems ■ Spectral Analysis ■ Portable Instrumentation
U TYPICAL APPLICATIO SNR vs Input Frequency,
+ OVDD
–1dB, 2V Range, 80Msps
10-BIT ANALOG INPUT PIPELINED D9A 65 INPUT A S/H OUTPUT • ADC CORE • DRIVERS • 64 – D0A 63 OGND 62 61 CLK A CLOCK/DUTY CYCLE CONTROL 60 MUX SNR (dBFS) 59 CLK B CLOCK/DUTY CYCLE 58 CONTROL 57 OVDD 56 D9B 55 + OUTPUT • 10-BIT • 0 50 100 150 200 ANALOG • INPUT DRIVERS PIPELINED D0B INPUT FREQUENCY (MHz) INPUT B S/H ADC CORE 2289 TA02 – OGND 2289 TA01 2289fa 1
