Datasheet LTC3713 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Low Input Voltage, High Power, No RSENSE Synchronous Buck DC/DC Controller |
| Pages / Page | 24 / 9 — OPERATIO. Main Control Loop. Buck Regulator Operation. INTVCC Power. … |
| File Format / Size | PDF / 291 Kb |
| Document Language | English |
OPERATIO. Main Control Loop. Buck Regulator Operation. INTVCC Power. Boost Regulator Operation
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Text Version of Document
LTC3713
U OPERATIO Main Control Loop
and M2 is turned on and held on until the overvoltage condition clears. The LTC3713 is a current mode controller for DC/DC step-down converters designed to operate from low input Foldback current limiting is provided if the output is voltages. It incorporates a boost converter with a buck shorted to ground. As VFB1 drops, the buffered current regulator. threshold voltage ITHB is pulled down by clamp Q3 to a 1V level set by Q4 and Q6. This reduces the inductor valley
Buck Regulator Operation
current level to one sixth of its maximum value as VFB1 In normal operation, the top MOSFET is turned on for a approaches 0V. fixed interval determined by a one-shot timer OST. When Pulling the RUN/SS pin low forces the controller into its the top MOSFET is turned off, the bottom MOSFET is shutdown state, turning off both M1 and M2. Releasing turned on until the current comparator ICMP trips, restart- the pin allows an internal 1.2µA current source to charge ing the one-shot timer and initiating the next cycle. Induc- up an external soft-start capacitor CSS. When this voltage tor current is determined by sensing the voltage between reaches 1.5V, the controller turns on and begins switch- the SENSE+ and SENSE– pins using the bottom MOSFET ing, but with the ITH voltage clamped at approximately on-resistance . The voltage on the ITH pin sets the com- 0.6V below the RUN/SS voltage. As CSS continues to parator threshold corresponding to inductor valley cur- charge, the soft-start current limit is removed. rent. The error amplifier EA adjusts this voltage by com- paring the feedback signal VFB1 from the output voltage
INTVCC Power
with an internal 0.8V reference. If the load current in- Power for the top and bottom MOSFET drivers and most creases, it causes a drop in the feedback voltage relative to of the internal controller circuitry is derived from the the reference. The ITH voltage then rises until the average INTV inductor current again matches the load current. CC pin. The top MOSFET driver is powered from a floating bootstrap capacitor CB. This capacitor is re- At low load currents, the inductor current can drop to zero charged from INTVCC through an external Schottky diode and become negative. This is detected by current reversal DB when the top MOSFET is turned off. comparator IREV which then shuts off M2, resulting in discontinuous operation. Both switches will remain off
Boost Regulator Operation
with the output capacitor supplying the load current until The 5V power source for INTVCC can be provided by a the ITH voltage rises above the zero current level (0.8V) to current mode, internally compensated fixed frequency initiate another cycle. Discontinuous mode operation is step-up switching regulator that has been incorporated disabled by comparator F when the FCB pin is brought into the LTC3713. below 0.8V, forcing continuous synchronous operation. Operation can be best understood by referring to the The operating frequency is determined implicitly by the Functional Diagrams. Q1 and Q2 form a bandgap refer- top MOSFET on-time and the duty cycle required to ence core whose loop is closed around the output of the maintain regulation. The one-shot timer generates an on- regulator. The voltage drop across R5 and R6 is low time that is proportional to the ideal duty cycle, thus enough such that Q1 and Q2 do not saturate, even when holding frequency approximately constant with changes VIN2 is 1V. When there is no load, VFB2 rises slightly above in VIN. The nominal frequency can be adjusted with an 1.23V, causing VC (the error amplifier’s output) to de- external resistor RON. crease. Comparator A2’s output stays high, keeping switch Overvoltage and undervoltage comparators OV and UV Q3 in the off state. As increased output loading causes the pull the PGOOD output low if the output feedback voltage VFB2 voltage to decrease, A1’s output increases. Switch exits a ±7.5% window around the regulation point. current is regulated directly on a cycle-by-cycle basis by Furthermore, in an overvoltage condition, M1 is turned off the VC node. The flip-flop is set at the beginning of each 3713fa 9
U OPERATIO Main Control Loop
and M2 is turned on and held on until the overvoltage condition clears. The LTC3713 is a current mode controller for DC/DC step-down converters designed to operate from low input Foldback current limiting is provided if the output is voltages. It incorporates a boost converter with a buck shorted to ground. As VFB1 drops, the buffered current regulator. threshold voltage ITHB is pulled down by clamp Q3 to a 1V level set by Q4 and Q6. This reduces the inductor valley
Buck Regulator Operation
current level to one sixth of its maximum value as VFB1 In normal operation, the top MOSFET is turned on for a approaches 0V. fixed interval determined by a one-shot timer OST. When Pulling the RUN/SS pin low forces the controller into its the top MOSFET is turned off, the bottom MOSFET is shutdown state, turning off both M1 and M2. Releasing turned on until the current comparator ICMP trips, restart- the pin allows an internal 1.2µA current source to charge ing the one-shot timer and initiating the next cycle. Induc- up an external soft-start capacitor CSS. When this voltage tor current is determined by sensing the voltage between reaches 1.5V, the controller turns on and begins switch- the SENSE+ and SENSE– pins using the bottom MOSFET ing, but with the ITH voltage clamped at approximately on-resistance . The voltage on the ITH pin sets the com- 0.6V below the RUN/SS voltage. As CSS continues to parator threshold corresponding to inductor valley cur- charge, the soft-start current limit is removed. rent. The error amplifier EA adjusts this voltage by com- paring the feedback signal VFB1 from the output voltage
INTVCC Power
with an internal 0.8V reference. If the load current in- Power for the top and bottom MOSFET drivers and most creases, it causes a drop in the feedback voltage relative to of the internal controller circuitry is derived from the the reference. The ITH voltage then rises until the average INTV inductor current again matches the load current. CC pin. The top MOSFET driver is powered from a floating bootstrap capacitor CB. This capacitor is re- At low load currents, the inductor current can drop to zero charged from INTVCC through an external Schottky diode and become negative. This is detected by current reversal DB when the top MOSFET is turned off. comparator IREV which then shuts off M2, resulting in discontinuous operation. Both switches will remain off
Boost Regulator Operation
with the output capacitor supplying the load current until The 5V power source for INTVCC can be provided by a the ITH voltage rises above the zero current level (0.8V) to current mode, internally compensated fixed frequency initiate another cycle. Discontinuous mode operation is step-up switching regulator that has been incorporated disabled by comparator F when the FCB pin is brought into the LTC3713. below 0.8V, forcing continuous synchronous operation. Operation can be best understood by referring to the The operating frequency is determined implicitly by the Functional Diagrams. Q1 and Q2 form a bandgap refer- top MOSFET on-time and the duty cycle required to ence core whose loop is closed around the output of the maintain regulation. The one-shot timer generates an on- regulator. The voltage drop across R5 and R6 is low time that is proportional to the ideal duty cycle, thus enough such that Q1 and Q2 do not saturate, even when holding frequency approximately constant with changes VIN2 is 1V. When there is no load, VFB2 rises slightly above in VIN. The nominal frequency can be adjusted with an 1.23V, causing VC (the error amplifier’s output) to de- external resistor RON. crease. Comparator A2’s output stays high, keeping switch Overvoltage and undervoltage comparators OV and UV Q3 in the off state. As increased output loading causes the pull the PGOOD output low if the output feedback voltage VFB2 voltage to decrease, A1’s output increases. Switch exits a ±7.5% window around the regulation point. current is regulated directly on a cycle-by-cycle basis by Furthermore, in an overvoltage condition, M1 is turned off the VC node. The flip-flop is set at the beginning of each 3713fa 9
