Datasheet AD4020 (Analog Devices)

ManufacturerAnalog Devices
Description20-Bit, 1.8 MSPS, Precision SAR, Differential ADC
Pages / Page37 / 1 — 20-Bit, 1.8 MSPS,. Precision SAR, Differential ADC. Data Sheet. AD4020. …
RevisionA
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Document LanguageEnglish

20-Bit, 1.8 MSPS,. Precision SAR, Differential ADC. Data Sheet. AD4020. FEATURES. GENERAL DESCRIPTION. Throughput: 1.8 MSPS maximum

Datasheet AD4020 Analog Devices, Revision: A

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20-Bit, 1.8 MSPS, Precision SAR, Differential ADC Data Sheet AD4020 FEATURES GENERAL DESCRIPTION Throughput: 1.8 MSPS maximum
The AD4020 is a low noise, low power, high speed, 20-bit,
INL: ±3.1 ppm maximum
1.8 MSPS precision successive approximation register (SAR)
Guaranteed 20-bit no missing codes
analog-to-digital converter (ADC). It incorporates ease of use
Low power
features that lower the signal chain power, reduce signal chain
9.0 mW at 1.8 MSPS (VDD only)
complexity, and enable higher channel density. The high-Z mode,
83 µW at 10 kSPS, 15 mW at 1.8 MSPS (total)
coupled with a long acquisition phase, eliminates the need for a
SNR: 100.5 dB typical at 1 kHz, 99 dB typical at 100 kHz
dedicated high power, high speed ADC driver, thus broadening the
THD: −123 dB typical at 1 kHz, −100 dB typical at 100 kHz
range of low power precision amplifiers that can drive this ADC
Ease of use features reduce system power and complexity
directly, while still achieving optimum performance. The input
Input overvoltage clamp circuit
span compression feature enables the ADC driver amplifier and the
Reduced nonlinear input charge kickback
ADC to operate off common supply rails without the need for a
High-Z mode
negative supply while preserving the full ADC code range. The
Long acquisition phase
low serial peripheral interface (SPI) clock rate requirement
Input span compression
reduces the digital input/output power consumption, broadens
Fast conversion time allows low SPI clock rates
processor options, and simplifies the task of sending data across
SPI-programmable modes, read/write capability, status word
digital isolation.
Differential analog input range: ±VREF
Operating from a 1.8 V supply, the AD4020 has a ±V
0 V to V
REF fully
REF with VREF from 2.4 V to 5.1 V
differential input range with V
Single 1.8 V supply operation with 1.71 V to 5.5 V logic interface
REF ranging from 2.4 V to 5.1 V. The AD4020 consumes only 15 mW at 1.8 MSPS with a minimum
SAR architecture: no latency/pipeline delay
SCK rate of 71 MHz in turbo mode and achieves ±3.1 ppm integral
Valid first accurate conversion
nonlinearity (INL), guaranteed no missing codes at 20 bits with
Guaranteed operation: −40°C to +125°C
100.5 dB typical signal-to-noise ratio (SNR). The reference voltage
Serial interface: SPI/QSPI/MICROWIRE/DSP compatible
is applied externally and can be set independently of the supply
Ability to daisy-chain multiple ADCs and busy indicator
voltage.
10-lead packages: 3 mm × 3 mm LFCSP, 3 mm × 4.90 mm MSOP
The SPI-compatible versatile serial interface features seven different
APPLICATIONS
modes including the ability, using the SDI input, to daisy-chain
Automatic test equipment
several ADCs on a single 3-wire bus, and provides an optional busy
Machine automation
indicator. The AD4020 is compatible with 1.8 V, 2.5 V, 3 V, and 5 V
Medical equipment
logic, using the separate VIO supply.
Battery-powered equipment
The AD4020 is available in a 10-lead MSOP or a 10-lead LFCSP
Precision data acquisition systems
with operation specified from −40°C to +125°C. The device is pin compatible with the 18-bit, 2 MSPS AD4003.
FUNCTIONAL BLOCK DIAGRAM 2.5V TO 5V 1.8V 10µF REF VDD VIO VREF 1.8V TO 5V HIGH-Z AD4020 V TURBO SDI REF/2 MODE MODE 0 IN+ SCK 20-BIT SERIAL 3-WIRE OR 4-WIRE INTERFACE SDO SAR ADC SPI INTERFACE V (DAISY CHAIN, CS) REF IN– STATUS CNV V CLAMP SPAN REF/2 COMPRESSION BITS 0
001
GND
15369- Figure 1.
Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION TRANSFER FUNCTIONS APPLICATIONS INFORMATION TYPICAL APPLICATION DIAGRAMS ANALOG INPUTS Input Overvoltage Clamp Circuit Differential Input Considerations Switched Capacitor Input RC Filter Values DRIVER AMPLIFIER CHOICE Single to Differential Driver High Frequency Input Signals Multiplexed Applications EASE OF DRIVE FEATURES Input Span Compression High-Z Mode Long Acquisition Phase VOLTAGE REFERENCE INPUT POWER SUPPLY DIGITAL INTERFACE REGISTER READ/WRITE FUNCTIONALITY STATUS WORD /CS MODE, 3-WIRE TURBO MODE /CS MODE, 3-WIRE WITHOUT THE BUSY INDICATOR /CS MODE, 3-WIRE WITH THE BUSY INDICATOR /CS MODE, 4-WIRE TURBO MODE /CS MODE, 4-WIRE WITHOUT THE BUSY INDICATOR /CS MODE, 4-WIRE WITH THE BUSY INDICATOR DAISY-CHAIN MODE LAYOUT GUIDELINES EVALUATING THE AD4020 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE