Datasheet AD7903 (Analog Devices) - 6

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Data Sheet AD7903 TIMING SPECIFICATIONS
−40°C to +125°C, VDD = 2.37 V to 2.63 V, VIO = 2.3 V to 5.5 V, unless otherwise stated. See Figure 2 and Figure 3 for load conditions.
Table 4. Parameter Symbol Min Typ Max Unit
Conversion Time (CNVx Rising Edge to Data Available) tCONV 500 710 ns Acquisition Time tACQ 290 ns Time Between Conversions tCYC VIOx Above 2.3 V 1000 ns CNVx Pulse Width (CS Mode) tCNVH 10 ns SCKx Period (CS Mode) tSCK VIOx Above 4.5 V 10.5 ns VIOx Above 3 V 12 ns VIOx Above 2.7 V 13 ns VIOx Above 2.3 V 15 ns SCKx Period (Chain mode) tSCK VIOx Above 4.5 V 11.5 ns VIOx Above 3 V 13 ns VIOx Above 2.7 V 14 ns VIOx Above 2.3 V 16 ns SCKx Low Time tSCKL 4.5 ns SCKx High Time tSCKH 4.5 ns SCKx Falling Edge to Data Remains Valid tHSDO 3 ns SCKx Falling Edge to Data Valid Delay tDSDO VIOx Above 4.5 V 9.5 ns VIOx Above 3 V 11 ns VIOx Above 2.7 V 12 ns VIOx Above 2.3 V 14 ns CNVx or SDIx Low to SDOx, D15 (MSB) Valid (CS Mode) tEN VIOx Above 3 V 10 ns VIOx Above 2.3 V 15 ns CNVx or SDIx High or Last SCKx Falling Edge to SDOx High Impedance (CS Mode) tDIS 20 ns SDIx Valid Setup Time from CNVx Rising Edge (CS Mode) tSSDICNV 5 ns SDIx Valid Hold Time from CNVx Rising Edge (CS Mode) tHSDICNV 2 ns SCKx Valid Setup Time from CNVx Rising Edge (Chain Mode) tSSCKCNV 5 ns SCKx Valid Hold Time from CNVx Rising Edge (Chain Mode) tHSCKCNV 5 ns SDIx Valid Setup Time from SCKx Falling Edge (Chain Mode) tSSDISCK 2 ns SDIx Valid Hold Time from SCKx Falling Edge (Chain Mode) tHSDISCK 3 ns SDIx High to SDOx High (Chain Mode with Busy Indicator) tDSDOSDI 15 ns
500µA I Y% VIOx1 OL X% VIOx1 tDELAY tDELAY V 2 2 TO SDOx 1.4V IH VIH 2 2 C V V L IL IL 20pF 1FOR VIOx ≤ 3.0V, X = 90 AND Y = 10; FOR VIOx > 3.0V, X = 70 AND Y = 30.
02 0
2
003
500µA I MINIMUM V OH
5-
IH AND MAXIMUM VIL USED. SEE SPECIFICATIONS FOR DIGITAL
75 1
INPUTS PARAMETER IN TABLE 3.
1 11755- Figure 2. Load Circuit for Digital Interface Timing Figure 3. Voltage Levels for Timing Rev. B | Page 5 of 28 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Circuit Information Converter Operation Transfer Functions Typical Connection Diagram Analog Inputs Driver Amplifier Choice Single-to-Differential Driver Voltage Reference Input Power Supply Digital Interface CS Mode CS Mode, 3-Wire Interface Without Busy Indicator CS Mode, 3-Wire Interface with Busy Indicator CS Mode, 4-Wire Interface Without Busy Indicator CS Mode, 4-Wire Interface with Busy Indicator Chain Mode Chain Mode Without Busy Indicator Chain Mode with Busy Indicator Applications Information Simultaneous Sampling Functional Safety Considerations Layout Evaluating Performance of the AD7903 Outline Dimensions Ordering Guide