Datasheet AD7903 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Dual Differential 16-Bit, 1 MSPS PulSAR 12.0 mW in QSOP |
| Pages / Page | 29 / 8 — Data Sheet. AD7903. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. REF1 1. … |
| Revision | B |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
Data Sheet. AD7903. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. REF1 1. 20 VIO1. VDD1 2. 19 SDI1. IN1+ 3. 18 SCK1. IN1– 4. 17 SDO1. TOP VIEW
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Text Version of Document
Data Sheet AD7903 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS REF1 1 20 VIO1 VDD1 2 19 SDI1 IN1+ 3 18 SCK1 AD7903 IN1– 4 17 SDO1 TOP VIEW GND 5 (Not to Scale) 16 CNV1 REF2 6 15 VIO2 VDD2 7 14 SDI2 IN2+ 8 13 SCK2 IN2– 9 12 SDO2
04 0
GND 10 11 CNV2
55- 17 1 Figure 4. Pin Configuration
Table 6. Pin Function Descriptions Pin No. Mnemonic Type1 Description
1, 6 REF1, REF2 AI Reference Input Voltage. The REFx range is 2.4 V to 5.1 V. These pins are referred to the GND pin, and decouple each pin closely to the GND pin with a 10 μF capacitor. 2, 7 VDD1, VDD2 P Power Supplies. 3, 8 IN1+, IN2+ AI Differential Positive Analog Inputs. 4, 9 IN1−, IN2− AI Differential Negative Analog Inputs. 5, 10 GND P Power Supply Ground. 11, 16 CNV2, CNV1 DI Conversion Inputs. These inputs have multiple functions. On the leading edge, they initiate conversions and select the interface mode of the device: chain mode or active low chip select (CS) mode. In CS mode, the SDOx pins are enabled when the CNVx pins are low. In chain mode, the data must be read when the CNVx pins are high. 12, 17 SDO2, SDO1 DO Serial Data Outputs. The conversion result is output on these pins. The conversion result is synchronized to SCKx. 13, 18 SCK2, SCK1 DI Serial Data Clock Inputs. When the device is selected, the conversion results are shifted out by these clocks. 14, 19 SDI2, SDI1 DI Serial Data Inputs. These inputs provide multiple functions. They select the interface mode of the ADC, as follows: CS mode is selected if the SDIx pins are high during the CNVx rising edge. In this mode, either SDIx or CNVx can enable the serial output signals when low. If SDIx or CNVx is low when the conversion is complete, the busy indicator feature is enabled. 15, 20 VIO2, VIO1 P Input/Output Interface Digital Power. Nominally at the same supply as the host interface (2.5 V or 3.3 V). 1 AI = analog input, DI = digital input, DO = digital output, and P = power. Rev. B | Page 7 of 28 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Circuit Information Converter Operation Transfer Functions Typical Connection Diagram Analog Inputs Driver Amplifier Choice Single-to-Differential Driver Voltage Reference Input Power Supply Digital Interface CS Mode CS Mode, 3-Wire Interface Without Busy Indicator CS Mode, 3-Wire Interface with Busy Indicator CS Mode, 4-Wire Interface Without Busy Indicator CS Mode, 4-Wire Interface with Busy Indicator Chain Mode Chain Mode Without Busy Indicator Chain Mode with Busy Indicator Applications Information Simultaneous Sampling Functional Safety Considerations Layout Evaluating Performance of the AD7903 Outline Dimensions Ordering Guide
04 0
GND 10 11 CNV2
55- 17 1 Figure 4. Pin Configuration
Table 6. Pin Function Descriptions Pin No. Mnemonic Type1 Description
1, 6 REF1, REF2 AI Reference Input Voltage. The REFx range is 2.4 V to 5.1 V. These pins are referred to the GND pin, and decouple each pin closely to the GND pin with a 10 μF capacitor. 2, 7 VDD1, VDD2 P Power Supplies. 3, 8 IN1+, IN2+ AI Differential Positive Analog Inputs. 4, 9 IN1−, IN2− AI Differential Negative Analog Inputs. 5, 10 GND P Power Supply Ground. 11, 16 CNV2, CNV1 DI Conversion Inputs. These inputs have multiple functions. On the leading edge, they initiate conversions and select the interface mode of the device: chain mode or active low chip select (CS) mode. In CS mode, the SDOx pins are enabled when the CNVx pins are low. In chain mode, the data must be read when the CNVx pins are high. 12, 17 SDO2, SDO1 DO Serial Data Outputs. The conversion result is output on these pins. The conversion result is synchronized to SCKx. 13, 18 SCK2, SCK1 DI Serial Data Clock Inputs. When the device is selected, the conversion results are shifted out by these clocks. 14, 19 SDI2, SDI1 DI Serial Data Inputs. These inputs provide multiple functions. They select the interface mode of the ADC, as follows: CS mode is selected if the SDIx pins are high during the CNVx rising edge. In this mode, either SDIx or CNVx can enable the serial output signals when low. If SDIx or CNVx is low when the conversion is complete, the busy indicator feature is enabled. 15, 20 VIO2, VIO1 P Input/Output Interface Digital Power. Nominally at the same supply as the host interface (2.5 V or 3.3 V). 1 AI = analog input, DI = digital input, DO = digital output, and P = power. Rev. B | Page 7 of 28 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Circuit Information Converter Operation Transfer Functions Typical Connection Diagram Analog Inputs Driver Amplifier Choice Single-to-Differential Driver Voltage Reference Input Power Supply Digital Interface CS Mode CS Mode, 3-Wire Interface Without Busy Indicator CS Mode, 3-Wire Interface with Busy Indicator CS Mode, 4-Wire Interface Without Busy Indicator CS Mode, 4-Wire Interface with Busy Indicator Chain Mode Chain Mode Without Busy Indicator Chain Mode with Busy Indicator Applications Information Simultaneous Sampling Functional Safety Considerations Layout Evaluating Performance of the AD7903 Outline Dimensions Ordering Guide
