Datasheet AD7690 (Analog Devices) - 6

ManufacturerAnalog Devices
Description18-Bit, 1.5 LSB INL, 400 kSPS PulSAR® Differential ADC in MSOP/QFN
Pages / Page25 / 6 — Data Sheet. AD7690. TIMING SPECIFICATIONS. Table 4.1 Parameter. Symbol. …
RevisionC
File Format / SizePDF / 684 Kb
Document LanguageEnglish

Data Sheet. AD7690. TIMING SPECIFICATIONS. Table 4.1 Parameter. Symbol. Min. Typ. Max. Unit. 500. 70% VIO. 30% VIO. tDELAY. 2V OR VIO – 0.5V1

Data Sheet AD7690 TIMING SPECIFICATIONS Table 4.1 Parameter Symbol Min Typ Max Unit 500 70% VIO 30% VIO tDELAY 2V OR VIO – 0.5V1

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Data Sheet AD7690 TIMING SPECIFICATIONS
VDD = 4.75 V to 5.25 V, VIO = 2.3 V to VDD, VREF = VDD, all specifications TMIN to TMAX, unless otherwise noted.
Table 4.1 Parameter Symbol Min Typ Max Unit
Conversion Time: CNV Rising Edge to Data Available tCONV 0.5 2.1 µs Acquisition Time tACQ 400 ns Time Between Conversions tCYC 2.5 µs CNV Pulse Width (CS Mode) tCNVH 10 ns SCK Period (CS Mode) tSCK 15 ns SCK Period (Chain Mode) tSCK VIO Above 4.5 V 17 ns VIO Above 3 V 18 ns VIO Above 2.7 V 19 ns VIO Above 2.3 V 20 ns SCK Low Time tSCKL 7 ns SCK High Time tSCKH 7 ns SCK Falling Edge to Data Remains Valid tHSDO 4 ns SCK Falling Edge to Data Valid Delay tDSDO VIO Above 4.5 V 14 ns VIO Above 3 V 15 ns VIO Above 2.7 V 16 ns VIO Above 2.3 V 17 ns CNV or SDI Low to SDO D17 MSB Valid (CS Mode) tEN VIO Above 4.5 V 15 ns VIO Above 2.7 V 18 ns VIO Above 2.3 V 22 ns CNV or SDI High or Last SCK Fal ing Edge to SDO High Impedance (CS Mode) tDIS 25 ns SDI Valid Setup Time from CNV Rising Edge (CS Mode) tSSDICNV 15 ns SDI Valid Hold Time from CNV Rising Edge (CS Mode) tHSDICNV 0 ns SCK Valid Setup Time from CNV Rising Edge (Chain Mode) tSSCKCNV 5 ns SCK Valid Hold Time from CNV Rising Edge (Chain Mode) tHSCKCNV 10 ns SDI Valid Setup Time from SCK Falling Edge (Chain Mode) tSSDISCK 3 ns SDI Valid Hold Time from SCK Falling Edge (Chain Mode) tHSDISCK 4 ns SDI High to SDO High (Chain Mode with BUSY Indicator) tDSDOSDI VIO Above 4.5 V 15 ns VIO Above 2.3 V 26 ns 1 See Figure 3 and Figure 4 for load conditions.
500
µ
A I 70% VIO OL 30% VIO tDELAY tDELAY 2V OR VIO – 0.5V1 2V OR VIO – 0.5V1 TO SDO 1.4V C 0.8V OR 0.5V2 0.8V OR 0.5V2 L 50pF NOTES: 1. 2V IF VIO ABOVE 2.5V, VIO – 0.5V IF VIO BELOW 2.5V. 500
µ
A IOH 2. 0.8V IF VIO ABOVE 2.5V, 0.5V IF VIO BELOW 2.5V.
02968-002 02968-003 Figure 3. Load Circuit for Digital Interface Timing Figure 4. Voltage Levels for Timing Rev. C | Page 5 of 24 Document Outline FEATURES APPLICATIONS APPLICATION EXAMPLE GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE SINGLE-TO-DIFFERENTIAL DRIVER VOLTAGE REFERENCE INPUT POWER SUPPLY SUPPLYING THE ADC FROM THE REFERENCE DIGITAL INTERFACE CS MODE, 3-WIRE WITHOUT BUSY INDICATOR CS MODE, 3-WIRE WITH BUSY INDICATOR CS MODE, 4-WIRE WITHOUT BUSY INDICATOR CS MODE, 4-WIRE WITH BUSY INDICATOR CHAIN MODE WITHOUT BUSY INDICATOR CHAIN MODE WITH BUSY INDICATOR APPLICATION HINTS LAYOUT EVALUATING THE AD7690 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE