Datasheet AD7866 (Analog Devices)
Manufacturer | Analog Devices |
Description | Dual 1MSPS, 12-Bit, 2-Channel SAR ADC with Serial Interface |
Pages / Page | 25 / 1 — Dual 1 MSPS, 12-Bit, 2-Channel. SAR ADC with Serial Interface. AD7866. … |
Revision | A |
File Format / Size | PDF / 435 Kb |
Document Language | English |
Dual 1 MSPS, 12-Bit, 2-Channel. SAR ADC with Serial Interface. AD7866. FEATURES. FUNCTIONAL BLOCK DIAGRAM
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Dual 1 MSPS, 12-Bit, 2-Channel SAR ADC with Serial Interface AD7866 FEATURES FUNCTIONAL BLOCK DIAGRAM Dual 12-Bit, 2-Channel ADC Fast Throughput Rate: 1 MSPS VREF DCAPA REF SELECT AVDD DVDD Specified for VDD of 2.7 V to 5.25 V Low Power 2.5V BUF AD7866 11.4 mW Max at 1 MSPS with 3 V Supplies REF 24 mW Max at 1 MSPS with 5 V Supplies 12-BIT VA1 SUCCESSIVE OUTPUT D Wide Input Bandwidth MUX T/H OUTA VA2 APPROXIMATION DRIVERS 70 dB SNR at 300 kHz Input Frequency ADC On-Board Reference 2.5 V A0 –40
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C to +125
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C Operation RANGE CONTROL Flexible Power/Throughput Rate Management SCLK LOGIC CS Simultaneous Conversion/Read VDRIVE No Pipeline Delays High Speed Serial Interface SPITM/QSPITM/ 12-BIT VB1 SUCCESSIVE OUTPUT D MUX T/H OUTB MICROWIRETM/DSP Compatible VB2 APPROXIMATION DRIVERS ADC Shutdown Mode: 1
A Max 20-Lead TSSOP Package BUF GENERAL DESCRIPTION AGND AGND DCAPB DGND
The AD7866 is a dual 12-bit high speed, low power, successive approximation ADC. The part operates from a single 2.7 V to 5.25 V power supply and features throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a low noise,
PRODUCT HIGHLIGHTS
wide bandwidth track-and-hold amplifier that can handle 1. The AD7866 features two complete ADC functions, allowing input frequencies in excess of 10 MHz. simultaneous sampling and conversion of two channels. Each The conversion process and data acquisition are controlled ADC has a 2-channel input multiplexer. The conversion result using standard control inputs, allowing easy interfacing to of both channels is available simultaneously on separate data microprocessors or DSPs. The input signal is sampled on the lines, or may be taken on one data line if only one serial port falling edge of CS; conversion is also initiated at this point. is available. The conversion time is determined by the SCLK frequency. 2. High Throughput with Low Power Consumption—The There are no pipelined delays associated with the part. AD7866 offers a 1 MSPS throughput rate with 11.4 mW The AD7866 uses advanced design techniques to achieve maximum power consumption when operating at 3 V. very low power dissipation at high throughput rates. With 3 V 3. Flexible Power/Throughput Rate Management—The conver- supplies and 1 MSPS throughput rate, the part consumes a sion rate is determined by the serial clock, allowing the power maximum of 3.8 mA. With 5 V supplies and 1 MSPS, the consumption to be reduced as the conversion time is reduced current consumption is a maximum of 4.8 mA. The part also through a SCLK frequency increase. Power efficiency can be offers flexible power/throughput rate management when maximized at lower throughput rates if the part enters sleep operating in sleep mode. during conversions. The analog input range for the part can be selected to be a 0 V 4. No Pipeline Delay—The part features two standard successive to VREF range or a 2 ⫻ VREF range with either straight binary or approximation ADCs with accurate control of the sampling twos complement output coding. The AD7866 has an on-chip instant via a CS input and once off conversion control. 2.5 V reference that can be overdriven if an external reference is preferred. Each on-board ADC can also be supplied with a separate individual external reference. The AD7866 is available in a 20-lead thin shrink small outline (TSSOP) package. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise
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Document Outline FEATURES GENERAL DESCRIPTION PRODUCT HIGHLIGHTS FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS TERMINOLOGY Integral Nonlinearity Differential Nonlinearity Offset Error Offset Error Match Gain Error Gain Error Match Zero Code Error Zero Code Error Match Positive Gain Error Negative Gain Error Track-and-Hold Acquisition Time Signal-to-(Noise + Distortion) Ratio (SNDR) Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise Intermodulation Distortion Channel-to-Channel Isolation PSR (Power Supply Rejection) PERFORMANCE CURVES Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION ANALOG INPUT Analog Input Ranges Handling Bipolar Input Signals Transfer Functions Digital Inputs REFERENCE CONFIGURATION OPTIONS MODES OF OPERATION Normal Mode Partial Power-Down Mode Full Power-Down Mode POWER-UP TIMES POWER VS. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7866 to ADSP-218x AD7866 to TMS320C541 AD7866 to DSP-563xx APPLICATION HINTS Grounding and Layout Evaluating the AD7866 Performance OUTLINE DIMENSIONS Revision History