Datasheet AD7490 (Analog Devices) - 5

ManufacturerAnalog Devices
Description16-Channel, 1MSPS, 12-Bit ADC with Sequencer in 28-Lead TSSOP
Pages / Page29 / 5 — AD7490. Data Sheet. Parameter. Test Conditions/Comments. Min. Typ. Max. …
RevisionD
File Format / SizePDF / 759 Kb
Document LanguageEnglish

AD7490. Data Sheet. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit

AD7490 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit

Model Line for this Datasheet

Text Version of Document

link to page 23 link to page 6 link to page 11 link to page 24 link to page 5 link to page 5 link to page 5 link to page 5 link to page 5
AD7490 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit
LOGIC INPUTS Input High Voltage, VINH 0.7 × VDRIVE V Input Low Voltage, VINL 0.3 × VDRIVE V Input Current, IIN VIN = 0 V or VDRIVE ±0.01 ±1 µA Input Capacitance, CIN+3 10 pF LOGIC OUTPUTS Output High Voltage, VOH ISOURCE = 200 µA; VDD = 2.7 V to 5.25 V VDRIVE − 0.2 V Output Low Voltage, VOL ISINK = 200 µA 0.4 V Floating State Leakage Current WEAK/TRI bit set to 0 ±10 µA Floating State Output Capacitance3 WEAK/TRI bit set to 0 10 pF Output Coding Coding bit set to 1 Straight (Natural) Binary Coding bit set to 0 Twos Complement CONVERSION RATE Conversion Time 16 SCLK cycles, SCLK = 20 MHz 800 ns Track-and-Hold Acquisition Time2 Sine wave input 300 ns Full-scale step input 300 ns Throughput Rate VDD = 5 V (see the Serial Interface 1 MSPS section) POWER REQUIREMENTS VDD 2.7 5.25 V VDRIVE 2.7 5.25 V I 4 DD Digital inputs = 0 V or VDRIVE Normal Mode (Static) VDD = 2.7 V to 5.25 V, SCLK on or off 600 µA Normal Mode (Operational) VDD = 4.75 V to 5.25 V, fSCLK = 20 MHz 2.5 mA (fS = Maximum Throughput) VDD = 2.7 V to 3.6 V, fSCLK = 20 MHz 1.8 mA Auto Standby Mode fSAMPLE = 500 kSPS 1.55 mA Static 100 µA Auto Shutdown Mode fSAMPLE = 250 kSPS 960 µA Static 0.5 µA Full Shutdown Mode SCLK on or off 0.02 0.5 µA Power Dissipation4 Normal Mode (Operational) VDD = 5 V, fSCLK = 20 MHz 12.5 mW VDD = 3 V, fSCLK = 20 MHz 5.4 mW Auto Standby Mode (Static) VDD = 5 V 460 µW VDD = 3 V 276 µW Auto Shutdown Mode (Static) VDD = 5 V 2.5 µW VDD = 3 V 1.5 µW Full Shutdown Mode VDD = 5 V 2.5 µW VDD = 3 V 1.5 µW 1 Specifications apply for fSCLK up to 20 MHz. However, for serial interfacing requirements, see the Timing Specifications section. 2 See the Terminology section. 3 Guaranteed by characterization. 4 See the Power vs. Throughput Rate section. Rev. D | Page 4 of 28 Document Outline Features Functional Block Diagram General Description Product Highlights Revision History Specifications Timing Specifications Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Internal Register Structure Control Register Sequencer Operation Shadow Register Theory of Operation Circuit Information Converter Operation Analog Input ADC Transfer Function Handling Bipolar Input Signals Typical Connection Diagram Analog Input Channels Digital Input VDRIVE Reference Section Modes of Operation Normal Mode (PM1 = PM0 = 1) Full Shutdown (PM1 = 1, PM0 = 0) Auto Shutdown (PM1 = 0, PM0 = 1) Auto Standby (PM1 = PM0 = 0) Powering Up the AD7490 Serial Interface Power vs. Throughput Rate Microprocessor Interfacing AD7490 to TMS320C541 AD7490 to ADSP-21xx AD7490 to DSP563xx Application Hints Grounding and Layout PCB Design Guidelines for Chip Scale Package Evaluating the AD7490 Performance Outline Dimensions Ordering Guide