AD7893CONVERTER DETAILS amplifier. For the AD7893-10, R1 = 30 kΩ; R2 = 7.5 kΩ and The AD7893 is a fast, 12-bit single supply A/D converter. It R3 = 10 kΩ. For the AD7893-3, R1 = R2 = 6.5 kΩ, and R3 provides the user with signal scaling (AD7893-10), track/hold, is open circuit. For the AD7893-5, R1 and R3 = 5 kΩ while A/D converter and serial interface logic functions on a single R2 is open-circuit. chip. The A/D converter section of the AD7893 consists of a For the AD7893-10 and AD7893-3, the designed code transi- conventional successive-approximation converter based on an tions occur on successive integer LSB values (i.e., 1 LSB, 2 LSBs, R-2R ladder structure. The signal scaling on the AD7893-10, 3 LSBs . .). Output coding is twos complement binary with AD7893-5 and AD7893-3 allows the part to handle ± 10 V, 0 V 1 LSB = FS/4096. The ideal input/output transfer function for to +5 V and ± 2.5 V input signals, respectively, while operating the AD7893-10 and AD7893-3 is shown in Table I. from a single +5 V supply. The AD7893-2 accepts an analog in- put range of 0 V to +2.5 V. The part requires an external +2.5 V Table I. Ideal Input/Output Code Table for the AD7893-10/ reference. The reference input to the part is buffered on-chip. AD7893-3 A major advantage of the AD7893 is that it provides all of the Digital Output above functions in an 8-pin package, either 8-pin mini-DIP or Analog Input1Code Transition SOIC. This offers the user considerable space saving advantages over alternative solutions. The AD7893 typically consumes only +FSR/2 – 1 LSB2 011 . 110 to 011 . 111 25 mW, making it ideal for battery-powered applications. +FSR/2 – 2 LSBs 011 . 101 to 011 . 110 +FSR/2 – 3 LSBs 011 . 100 to 011 . 101 Conversion is initiated on the AD7893 by pulsing the CONVST input. On the rising edge of CONVST, the on-chip track/hold AGND + 1 LSB 000 . 000 to 000 . 001 goes from track-to-hold mode and the conversion sequence is AGND 111 . 111 to 000 . 000 started. The conversion clock for the part is generated internally AGND – 1 LSB 111 . 110 to 111 . 111 using a laser-trimmed clock oscillator circuit. Conversion time –FSR/2 + 3 LSBs 100 . 010 to 100 . 011 for the AD7893 is 6 µs, and the track/hold acquisition time is –FSR/2 + 2 LSBs 100 . 001 to 100 . 010 1.5 µs. To obtain optimum performance from the part, the read –FSR/2 + 1 LSB 100 . 000 to 100 . 001 operation should not occur during the conversion or during 600 ns prior to the next conversion. This allows the part to op- NOTES erate at throughput rates up to 117 kHz and to achieve data 1FSR is full-scale range and is 20 V (AD7893-10) and = 5 V (AD7893-3) with sheet specifications. The part can operate at higher throughput REF IN = +2.5 V. 2 rates (up to 133 kHz) with slightly degraded performance (see 1 LSB = FSR/4096 = 4.883 mV (AD7893-10) and 1.22 mV (AD7893-3) with REF IN = +2.5 V. Timing and Control section). For the AD7893-5, the designed code transitions occur again on CIRCUIT DESCRIPTION successive integer LSB values. Output coding is straight (natural) Analog Input Section binary with 1 LSB = FS/4096 = 5 V/4096 = 1.22 mV. The ideal The AD7893 is offered as four part types: the AD7893-10, input/output transfer function for the AD7893-5 is shown in which handles a ± 10 V input voltage range; the AD7893-3, Table II. which handles a ± 2.5 V input voltage range; the AD7893-5, The analog input section for the AD7893-2 contains no biasing which handles a 0 V to +5 V input range; and the AD7893-2, resistors, and the VIN pin drives the input directly to the track/ which handles a 0 V to +2.5 V input voltage range. hold amplifier. The analog input range is 0 V to +2.5 V into a Figure 2 shows the analog input section for the AD7893-10, high impedance stage, with an input current of less than AD7893-5 and AD7893-3. The analog input range of the 500 nA. This input is benign, with no dynamic charging cur- AD7893-10 is ± 10 V into an input resistance of typically 33 kΩ. rents. Once again, the designed code transitions occur on suc- The analog input range of the AD7893-3 is ±2.5 V into an input cessive integer LSB values. Output coding is straight (natural) resistance of typically 12 kΩ. The input range on the AD7893-5 is binary with 1 LSB = FS/4096 = 2.5 V/4096 = 0.61 mV. Table 0 V to +5 V into an input resistance of typically 11 kΩ. This in- II also shows the ideal input/output transfer function for the put is benign with no dynamic charging currents, as the resistor AD7893-2. stage is followed by a high input impedance stage of the track/hold Table II. Ideal Input/Output Code Table for AD7893-2/AD7893-5REF INDigital OutputAnalog Input1Code TransitionTO ADC REFERENCE +FSR – 1 LSB2 111 . 110 to 111 . 111 CIRCUITRYR2 +FSR – 2 LSB 111 . 101 to 111 . 110 R1VTO INTERNAL +FSR – 3 LSB 111 . 100 to 111 . 101 INCOMPARATORTRACK/R3 AGND + 3 LSB 000 . 010 to 000 . 011 HOLD AGND + 2 LSB 000 . 001 to 000 . 010 AGND AGND + 1 LSB 000 . 000 to 000 . 001 AD7893-10/AD7893-5 NOTES 1FSR is Full-Scale Range and is 5 V for AD7893-5 and 2.5 V for AD7893-2 with REF IN = +2.5 V. Figure 2. AD7893-10/AD7893-3/AD7893-5 Analog Input 21 LSB = FSR/4096 and is 1.22 mV for AD7893-5 and 0.61 mV for AD7893-2 Structure with REF IN = +2.5 V. –6– REV. E