Datasheet LTC4316 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | Single I2C/SMBus Address Translator |
| Pages / Page | 16 / 5 — TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VCC = 3.3V unless … |
| File Format / Size | PDF / 212 Kb |
| Document Language | English |
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VCC = 3.3V unless otherwise noted. SDAOUT Fall Delay vs Bus
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LTC4316
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VCC = 3.3V unless otherwise noted. SDAOUT Fall Delay vs Bus SDAOUT Fall Time vs SDAOUT Fall Time vs Bus Capacitance Temperature Capacitance
300 120 120 C = 100pF 275 VCC = 5V 100 100 250 V V CC = 5V CC = 5V (ns) 225 VCC = 3.3V (ns) 80 (ns) 80 200 V V CC = 3.3V CC = 3.3V 175 60 60 t f(SDAOUT) t f(SDAOUT) t PDHL(SDAOUT) VCC = 2.25V 150 40 V V 40 CC = 2.25V CC = 2.25V 125 100 20 20 0 200 400 600 800 1000 –50 –25 0 25 50 75 100 0 200 400 600 800 1000 CBUS (pF) TEMPERATURE (°C) CBUS (pF) 4316 G07 4316 G08 4316 G09
PIN FUNCTIONS XORL:
Translator XOR Lower Nibble Configuration Input. The pin releases high when the LTC4316 has completed The DC voltage at this pin configures the lower 4-bit nibble configuration of the address translation byte, SDAIN is of the address translation byte. Tie the pin to an external connected to SDAOUT and SCLIN is connected to SCLOUT. resistive divider connected between VCC and GND to set Connect a pull-up resistor, typically 10k, from this pin to the desired DC voltage. the bus pull-up supply. Leave open or tie to GND if unused.
XORH:
Translator XOR Upper Nibble Configuration Input.
SCLIN:
Input Bus Clock Input and Output. Connect this The DC voltage at this pin configures the upper 3-bit nibble pin to the SCL line on the master side. An external pull-up of the address translation byte. Tie the pin to an external resistor or current source is required. resistive divider connected between VCC and GND to set
SCLOUT:
Output Bus Clock Input and Output. Connect this the desired DC voltage. Connect this pin to VCC to activate pin to the SCL line on the slave side. An external pull-up pass-through mode. See Application Information section resistor or current source is required. for more details.
SDAIN:
Input Bus Data Input and Output. Connect this pin
ENABLE:
Enable Input. If ENABLE pin is low, the address to the SDA line on the master side. An external pull-up translation is disabled, SDAIN is disconnected from SD- resistor or current source is required. AOUT, and SCLIN is disconnected from SCLOUT. A low to high transition on ENABLE restarts the configuration of
SDAOUT:
Output Bus Data Input and Output. Connect this the address translation byte and also enables the address pin to the SDA line on the slave side. An external pull-up translation. Connect to VCC if unused. resistor or current source is required.
Exposed Pad (DFN Package Only):
Exposed pad may be
VCC:
Power Supply Input (2.25V to 5.5V). If the supply left open or connected to device GND. voltages for the input and output buses are different, con- nect this pin to the lower supply. If the input and output
GND:
Device Ground. supplies have the same nominal value and with tolerance
READY:
Ready Status Output. This is an open drain output less than or equal to ±10%, connect VCC to either supply. to indicate that the device is ready for address translation. Bypass with at least 0.1μF to GND. 4316fa For more information www.linear.com/LTC4316 5
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VCC = 3.3V unless otherwise noted. SDAOUT Fall Delay vs Bus SDAOUT Fall Time vs SDAOUT Fall Time vs Bus Capacitance Temperature Capacitance
300 120 120 C = 100pF 275 VCC = 5V 100 100 250 V V CC = 5V CC = 5V (ns) 225 VCC = 3.3V (ns) 80 (ns) 80 200 V V CC = 3.3V CC = 3.3V 175 60 60 t f(SDAOUT) t f(SDAOUT) t PDHL(SDAOUT) VCC = 2.25V 150 40 V V 40 CC = 2.25V CC = 2.25V 125 100 20 20 0 200 400 600 800 1000 –50 –25 0 25 50 75 100 0 200 400 600 800 1000 CBUS (pF) TEMPERATURE (°C) CBUS (pF) 4316 G07 4316 G08 4316 G09
PIN FUNCTIONS XORL:
Translator XOR Lower Nibble Configuration Input. The pin releases high when the LTC4316 has completed The DC voltage at this pin configures the lower 4-bit nibble configuration of the address translation byte, SDAIN is of the address translation byte. Tie the pin to an external connected to SDAOUT and SCLIN is connected to SCLOUT. resistive divider connected between VCC and GND to set Connect a pull-up resistor, typically 10k, from this pin to the desired DC voltage. the bus pull-up supply. Leave open or tie to GND if unused.
XORH:
Translator XOR Upper Nibble Configuration Input.
SCLIN:
Input Bus Clock Input and Output. Connect this The DC voltage at this pin configures the upper 3-bit nibble pin to the SCL line on the master side. An external pull-up of the address translation byte. Tie the pin to an external resistor or current source is required. resistive divider connected between VCC and GND to set
SCLOUT:
Output Bus Clock Input and Output. Connect this the desired DC voltage. Connect this pin to VCC to activate pin to the SCL line on the slave side. An external pull-up pass-through mode. See Application Information section resistor or current source is required. for more details.
SDAIN:
Input Bus Data Input and Output. Connect this pin
ENABLE:
Enable Input. If ENABLE pin is low, the address to the SDA line on the master side. An external pull-up translation is disabled, SDAIN is disconnected from SD- resistor or current source is required. AOUT, and SCLIN is disconnected from SCLOUT. A low to high transition on ENABLE restarts the configuration of
SDAOUT:
Output Bus Data Input and Output. Connect this the address translation byte and also enables the address pin to the SDA line on the slave side. An external pull-up translation. Connect to VCC if unused. resistor or current source is required.
Exposed Pad (DFN Package Only):
Exposed pad may be
VCC:
Power Supply Input (2.25V to 5.5V). If the supply left open or connected to device GND. voltages for the input and output buses are different, con- nect this pin to the lower supply. If the input and output
GND:
Device Ground. supplies have the same nominal value and with tolerance
READY:
Ready Status Output. This is an open drain output less than or equal to ±10%, connect VCC to either supply. to indicate that the device is ready for address translation. Bypass with at least 0.1μF to GND. 4316fa For more information www.linear.com/LTC4316 5
