Datasheet ADM1041A (Analog Devices) - 2

ManufacturerAnalog Devices
DescriptionSecondary-Side Controller with Current Share and Housekeeping
Pages / Page56 / 2 — ADM1041A. TABLE OF CONTENTS. REVISION HISTORY. 7/05—Revision 0: Initial …
File Format / SizePDF / 1.1 Mb
Document LanguageEnglish

ADM1041A. TABLE OF CONTENTS. REVISION HISTORY. 7/05—Revision 0: Initial Version

ADM1041A TABLE OF CONTENTS REVISION HISTORY 7/05—Revision 0: Initial Version

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ADM1041A TABLE OF CONTENTS
General Description ... 3 ISHARE Error Amplifier... 22 Sample Application Circuit Description ... 3 ISHARE Clamp .. 22 Specifications... 6 SHARE_OK Detector .. 23 Absolute Maximum Ratings.. 13 Pulse/ACSENSE2... 24 Thermal Characteristics .. 13 Pulse ... 24 ESD Caution.. 13 ACSENSE.. 24 Pin Configuration and Function Descriptions... 14 OrFET Gate Drive .. 25 Terminology .. 16 Oscillator and Timing Generators ... 27 Theory of Operation .. 18 Logic I/O and Monitor Pins.. 27 Power Management.. 18 SMBus Serial Port... 30 Gain Trimming and Configuration ... 18 Microprocessor Support.. 30 Differential Remote Sense Amplifier... 19 Broadcasting.. 30 Set Load Voltage ... 19 SMBus Serial Interface... 30 Load Overvoltage (OV) ... 19 General SMBus Timing ... 31 Local Voltage Sense .. 19 SMBus Protocols for RAM and EEPROM.. 33 Local Overvoltage Protection (OVP) .. 19 SMBus Read Operations ... 35 Local Undervoltage Protection (UVP) .. 19 SMBus Alert Response Address (ARA) .. 36 False UV Clamp.. 19 Support for SMBus 1.1... 36 Voltage Error Amplifier... 20 Layout Considerations... 36 Main Voltage Reference ... 20 Power-Up Auto-Configuration .. 36 Current-Sense Amplifier ... 20 Extended SMBus Addressing.. 37 Current Sensing .. 21 Backdoor Access... 37 Current-Transformer Input .. 21 Register Listing ... 38 Current-Sense Calibration .. 21 Detailed Register Descriptions ... 39 Current-Limit Error Amplifier... 21 Manufacturing Data... 48 Overcurrent Protection ... 22 Microprocessor Support .. 49 Current Share .. 22 Test Name Table.. 51 Current-Share Offset.. 22 Outline Dimensions ... 53 ISHARE Drive Amplifier .. 22 Ordering Guide .. 53 Differential Sense Amplifier ... 22
REVISION HISTORY 7/05—Revision 0: Initial Version
Rev. 0 | Page 2 of 56 Document Outline FEATURES SECONDARY-SIDE FEATURES INTERFACE AND INTERNAL FEATURES APPLICATIONS GENERAL DESCRIPTION SAMPLE APPLICATION CIRCUIT DESCRIPTION SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY THEORY OF OPERATION POWER MANAGEMENT GAIN TRIMMING AND CONFIGURATION DIFFERENTIAL REMOTE SENSE AMPLIFIER SET LOAD VOLTAGE LOAD OVERVOLTAGE (OV) LOCAL VOLTAGE SENSE LOCAL OVERVOLTAGE PROTECTION (OVP) LOCAL UNDERVOLTAGE PROTECTION (UVP) FALSE UV CLAMP VOLTAGE ERROR AMPLIFIER MAIN VOLTAGE REFERENCE CURRENT-SENSE AMPLIFIER CURRENT SENSING CURRENT-TRANSFORMER INPUT CURRENT-SENSE CALIBRATION CURRENT-LIMIT ERROR AMPLIFIER OVERCURRENT PROTECTION CURRENT SHARE CURRENT-SHARE OFFSET ISHARE DRIVE AMPLIFIER DIFFERENTIAL SENSE AMPLIFIER ISHARE ERROR AMPLIFIER ISHARE CLAMP SHARE_OK DETECTOR PULSE/ACSENSE2 PULSE ACSENSE OrFET GATE DRIVE OSCILLATOR AND TIMING GENERATORS LOGIC I/O AND MONITOR PINS CBD/ALERT MON1 MON2 PEN PSON MON3 DC_OK (POWER-OK, POWER Good, Etc.) MON4 AC_OK MON5 SMBus SERIAL PORT MICROPROCESSOR SUPPORT Interfacing Configuring for a Microprocessor BROADCASTING SMBus SERIAL INTERFACE GENERAL SMBus TIMING SMBus PROTOCOLS FOR RAM AND EEPROM SMBus Erase EEPROM Page Operations SMBus Write Operations Send Byte Write Byte/Word Block Write SMBus READ OPERATIONS Receive Byte Block Read Notes on SMBus Read Operations SMBus ALERT RESPONSE ADDRESS (ARA) SUPPORT FOR SMBus 1.1 LAYOUT CONSIDERATIONS POWER-UP AUTO-CONFIGURATION EXTENDED SMBus ADDRESSING SDA/PSONLINK SCL/AC_OKLink BACKDOOR ACCESS REGISTER LISTING DETAILED REGISTER DESCRIPTIONS MANUFACTURING DATA MICROPROCESSOR SUPPORT TEST NAME TABLE OUTLINE DIMENSIONS ORDERING GUIDE