Datasheet ADA4945-1 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | High-Speed, ±0.3µV/°C Offset Drift, Fully Differential ADC Driver |
| Pages / Page | 18 / 5 — Preliminary Technical Data. ADA4945-1. VOCM to VOUT, cm Performance. … |
| Revision | PrC |
| File Format / Size | PDF / 468 Kb |
| Document Language | English |
Preliminary Technical Data. ADA4945-1. VOCM to VOUT, cm Performance. Table 3. Full Power Mode. Low Power Mode. Parameter
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Preliminary Technical Data ADA4945-1 VOCM to VOUT, cm Performance Table 3. Full Power Mode Low Power Mode Parameter Test Conditions/Comments Min Typ Max Min Typ Max Unit
VOCM DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth VOUT, cm = 20 mV p-p 35 15 MHz −3 dB Large Signal Bandwidth VOUT, cm = 2 V p-p TBD TBD MHz Slew Rate VOUT, cm = TBD V p-p TBD TBD V/µs Input Voltage Noise f = 100 kHz 35 45 nV/√Hz Gain ΔVOUT, cm/ΔVOCM, ΔVOCM = ±1 V 0.99 1 1.01 0.99 1 1.01 V/V VOCM CHARACTERISTICS Input Common-Mode Voltage Range −VS + +VS − −VS + +VS − V 0.4 1.4 0.4 1.4 Input Resistance 125 125 kΩ Offset Voltage Common mode offset (VOS, cm) = VOUT, cm − VOCM, positive input (VIP) = negative input (VIN) = VOCM = 0 V 25°C ±10 ±100 ±10 ±100 mV 20°C to 85°C TBD TBD mV −40°C to +125°C TBD TBD mV Input Offset Voltage Drift 20°C to 85°C TBD TBD µV/°C −40°C to +125°C TBD TBD µV/°C Input Bias Current 25°C TBD TBD µA 20°C to 85°C TBD TBD µA −40°C to +125°C TBD TBD µA Input Bias Current Drift 20°C to 85°C TBD TBD µA/°C −40°C to +125°C TBD TBD µA/°C CMRR ΔVOS, dm/ΔVOCM, ΔVOCM = ±1 V −130 −130 dB
General Performance Table 4. Full Power Mode Low Power Mode Parameter Test Conditions/Comments Min Typ Max Min Typ Max Unit
CLAMP Clamp Output Voltage Differential −VS − 0.5 +VS + −VS − 0.5 +VS + V 0.5 0.5 Common mode −VS +VS −VS +VS V Recovery Time TBD TBD ns Input Resistance Resistance between +VCLAMP and 480 480 kΩ −VCLAMP DISABLE (DISABLE PIN) MODE Input Voltage Disabled −VS – DGND + 1 −VS – DGND + 1 V 0.3 0.3 Enabled DGND + VS + 0.3 DGND + VS + 0.3 V 1.4 1.4 Turn Off Time 50% of quiescent current < 10% of 1 TBD µs enabled quiescent current Turn On Time 50% of turn on time (tO) >90% of 1 TBD µs final VOUT DISABLE Pin Bias Current Enabled DISABLE = 10 V 50 50 nA Disabled DISABLE = 0 V 50 50 nA Rev. PrA | Page 5 of 18 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Specifications Supply Voltage (VS) = 10 V Positive Input (+DIN) or Negative Input (–DIN) to Differential Output Voltage (VOUT, dm) Performance VOCM to VOUT, cm Performance General Performance VS = 5 V +DIN or –DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance VS = 3 V +DIN or –DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configuration and Function Descriptions Terminology Outline Dimensions
VOCM DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth VOUT, cm = 20 mV p-p 35 15 MHz −3 dB Large Signal Bandwidth VOUT, cm = 2 V p-p TBD TBD MHz Slew Rate VOUT, cm = TBD V p-p TBD TBD V/µs Input Voltage Noise f = 100 kHz 35 45 nV/√Hz Gain ΔVOUT, cm/ΔVOCM, ΔVOCM = ±1 V 0.99 1 1.01 0.99 1 1.01 V/V VOCM CHARACTERISTICS Input Common-Mode Voltage Range −VS + +VS − −VS + +VS − V 0.4 1.4 0.4 1.4 Input Resistance 125 125 kΩ Offset Voltage Common mode offset (VOS, cm) = VOUT, cm − VOCM, positive input (VIP) = negative input (VIN) = VOCM = 0 V 25°C ±10 ±100 ±10 ±100 mV 20°C to 85°C TBD TBD mV −40°C to +125°C TBD TBD mV Input Offset Voltage Drift 20°C to 85°C TBD TBD µV/°C −40°C to +125°C TBD TBD µV/°C Input Bias Current 25°C TBD TBD µA 20°C to 85°C TBD TBD µA −40°C to +125°C TBD TBD µA Input Bias Current Drift 20°C to 85°C TBD TBD µA/°C −40°C to +125°C TBD TBD µA/°C CMRR ΔVOS, dm/ΔVOCM, ΔVOCM = ±1 V −130 −130 dB
General Performance Table 4. Full Power Mode Low Power Mode Parameter Test Conditions/Comments Min Typ Max Min Typ Max Unit
CLAMP Clamp Output Voltage Differential −VS − 0.5 +VS + −VS − 0.5 +VS + V 0.5 0.5 Common mode −VS +VS −VS +VS V Recovery Time TBD TBD ns Input Resistance Resistance between +VCLAMP and 480 480 kΩ −VCLAMP DISABLE (DISABLE PIN) MODE Input Voltage Disabled −VS – DGND + 1 −VS – DGND + 1 V 0.3 0.3 Enabled DGND + VS + 0.3 DGND + VS + 0.3 V 1.4 1.4 Turn Off Time 50% of quiescent current < 10% of 1 TBD µs enabled quiescent current Turn On Time 50% of turn on time (tO) >90% of 1 TBD µs final VOUT DISABLE Pin Bias Current Enabled DISABLE = 10 V 50 50 nA Disabled DISABLE = 0 V 50 50 nA Rev. PrA | Page 5 of 18 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Specifications Supply Voltage (VS) = 10 V Positive Input (+DIN) or Negative Input (–DIN) to Differential Output Voltage (VOUT, dm) Performance VOCM to VOUT, cm Performance General Performance VS = 5 V +DIN or –DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance VS = 3 V +DIN or –DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configuration and Function Descriptions Terminology Outline Dimensions
