Datasheet AD8376 (Analog Devices)

ManufacturerAnalog Devices
DescriptionUltralow Distortion IF Dual VGA
Pages / Page24 / 1 — Ultralow Distortion IF Dual VGA. Data Sheet. AD8376. FEATURES. FUNCTIONAL …
RevisionB
File Format / SizePDF / 1.2 Mb
Document LanguageEnglish

Ultralow Distortion IF Dual VGA. Data Sheet. AD8376. FEATURES. FUNCTIONAL BLOCK DIAGRAM

Datasheet AD8376 Analog Devices, Revision: B

Model Line for this Datasheet

Text Version of Document

Ultralow Distortion IF Dual VGA Data Sheet AD8376 FEATURES FUNCTIONAL BLOCK DIAGRAM Dual independent digitally controlled VGAs A4 A3 A2 A1 A0 VCCA GNDA Bandwidth of 700 MHz (−3 dB) CHANNEL A Gain range: −4 dB to +20 dB GAIN AD8376 Step size: 1 dB ± 0.2 dB DECODER Differential input and output OPA+ IPA+ OPA+ Noise figure: 8.7 dB @ maximum gain POST-AMP
α
Output IP3 of ~50 dBm at 200 MHz IPA– OPA– Output P1dB of 20 dBm at 200 MHz OPA– VCMA Dual parallel 5-bit control interface ENBA Provides constant SFDR vs. gain ENBB VCMB Power-down control OPB+ IPB+ Single 5 V supply operation OPB+ 32-lead, 5 mm x 5 mm LFCSP POST-AMP
α
IPB– OPB– APPLICATIONS OPB– Differential ADC drivers CHANNEL B GAIN Main and diversity IF sampling receivers DECODER Wideband multichannel receivers
001
Instrumentation B4 B3 B2 B1 B0 VCCB GNDB
06725- Figure 1.
GENERAL DESCRIPTION
The AD8376 is a dual channel, digitally controlled, variable gain AD8376 consumes less than 5 mA and offers excellent input-to- wide bandwidth amplifier that provides precise gain control, output isolation, lower than −50 dB at 200 MHz. high IP3, and low noise figure. The excel ent distortion perform- Fabricated on an Analog Devices, Inc., high speed SiGe process, ance and high signal bandwidth make the AD8376 an excellent the AD8376 is supplied in a compact, thermally enhanced, gain control device for a variety of receiver applications. 5 mm × 5mm 32-lead LFCSP package and operates over the Using an advanced high speed SiGe process and incorporating temperature range of −40°C to +85°C. proprietary distortion cancel ation techniques, the AD8376
p –40 65
achieves 50 dBm output IP3 at 200 MHz.
p- V 2 –50 60
The AD8376 provides a broad 24 dB gain range with 1 dB
E T @ U
resolution. The gain of each channel is adjusted through
/TON TP –60 55 m
dedicated 5-pin control interfaces and can be driven using
dB OIP3 ), OU 3
standard TTL levels. The open-col ector outputs provide a
c –70 50 dB T @ U
flexible interface, allowing the overall signal gain to be set by
( TP
the loading impedance. Thus, the signal voltage gain is directly
–80 45 TION ), OU
proportional to the load.
HD2 TOR m IS –90 40 dB D (
Each channel of the AD8376 can be individually powered on by
3 IC HD3 OIP
applying the appropriate logic level to the ENBA and ENBB
ON –100 35 M R
power enable pins. The quiescent current of the AD8376 is
A H –110 30
typical y 130 mA per channel. When powered down, the
40 60 80 100 120 140 160 180 200
052
FREQUENCY (MHz)
06725- Figure 2. Harmonic Distortion and Output IP3 vs. Frequency
Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2007–2013 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Circuit Description Basic Structure Input System Output Amplifier Gain Control Applications Basic Connections Single-Ended-to-Differential Conversion Broadband Operation ADC Interfacing Layout Considerations Characterization Test Circuits Differential-to-Differential Characterization Evaluation Board Outline Dimensions Ordering Guide