Datasheet LTC3672B-2 (Analog Devices) - 10
| Manufacturer | Analog Devices |
| Description | Monolithic Fixed-Output 400mA Buck Regulator with Dual 150mA LDOs in 2mm × 2mm DFN |
| Pages / Page | 12 / 10 — APPLICATIONS INFORMATION. PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS |
| File Format / Size | PDF / 161 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS
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LTC3672B-2
APPLICATIONS INFORMATION PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS
should connect directly to the ground plane of the part. The V When laying out the printed circuit board, the following IN capacitor provides the AC current to the buck regulator’s power MOSFETs and their drivers. It is especially important list should be followed to ensure proper operation of the to minimize PCB trace inductance from this capacitor to LTC3672B-2: the VIN and GND pins of the LTC3672B-2. 1) The Exposed Pad of the package should connect directly 3) The switching power trace connecting the SW pin to to a large ground plane to minimize thermal and electrical the inductor should be kept as short as possible to reduce impedance. radiated EMI and parasitic coupling. 2) The connections from the input supply pins (VIN and 4) The LDO output capacitors should be placed as close VIN1) to their respective decoupling capacitors should be to the IC as possible, and connect to the LDO outputs and kept as short as possible. The GND side of these capacitors the GND pin as directly as possible. 3672b2fa 10
APPLICATIONS INFORMATION PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS
should connect directly to the ground plane of the part. The V When laying out the printed circuit board, the following IN capacitor provides the AC current to the buck regulator’s power MOSFETs and their drivers. It is especially important list should be followed to ensure proper operation of the to minimize PCB trace inductance from this capacitor to LTC3672B-2: the VIN and GND pins of the LTC3672B-2. 1) The Exposed Pad of the package should connect directly 3) The switching power trace connecting the SW pin to to a large ground plane to minimize thermal and electrical the inductor should be kept as short as possible to reduce impedance. radiated EMI and parasitic coupling. 2) The connections from the input supply pins (VIN and 4) The LDO output capacitors should be placed as close VIN1) to their respective decoupling capacitors should be to the IC as possible, and connect to the LDO outputs and kept as short as possible. The GND side of these capacitors the GND pin as directly as possible. 3672b2fa 10
