Datasheet A80603, A80603-1 (Allegro) - 7

A80603 and LED Driver with Pre-Emptive Boost A80603-1 for Ultra-High Dimming Ratio and Low Output Ripple ELECTRICAL CHARACTERISTICS [1] (continued): Unless otherwise noted, specifications are valid at VIN = 16 V, TJ = 25°C, • indi- cates specifications guaranteed over the full operating temperature range with TJ = –40°C to 125°C, typical specifications are at TJ = 25°C Characteristics Symbol Test Conditions Min. Typ. Max. Unit DITHERING CONTROL
DITH Pin Source Current iDITH(src) Output current when VDITH < 0.8 V − 20 − μA DITH Pin Sink Current iDITH(sink) Output current when VDITH > 1.2 V − −20 − μA
OVERVOLTAGE PROTECTION
OVP Pin Voltage Threshold VOVP(th) OVP pin connected to VOUT ● 2.2 2.5 2.8 V Current into OVP pin at 125ºC 140 146.5 153 µA OVP Pin Sense Current Threshold iOVP(th) Measured over temperature ● 140 150 160 µA OVP Sense Current Temperature Coefficient [2] ∆iOVP Current into OVP pin − −36 − nA/ºC OVP Pin Leakage Current IOVPLKG VOUT = 16 V, EN = L ● − 0.1 1 µA OVP Variation at Output ΔOVP Measured at VOUT when ROVP = 249 kΩ − − 5 % Measured at V Undervoltage Detection Threshold V OUT when ROVP = 249 kΩ [2] − 3.3 4.2 V UVP(th) Measured at VOUT when ROVP = 0 Ω − 0.2 0.25 V Secondary Overvoltage Protection V Measured at SW pin; part latches when OVP2 OVP2 is detected ● 51 55 59 V
BOOST SWITCH
Switch On Resistance RSW ISW = 0.75 A, VIN = 16 V ● − 250 500 mΩ I Switch Pin Leakage Current SWLKG25 VSW = 13.5 V, VPWM = VIL, TJ = 25°C − 0.1 1 µA ISWLKG85 [2] VSW = 13.5 V, VPWM = VIL, TJ = 85°C − − 10 µA Switch Pin Current Limit I IC truncates present switching cycle when SW(LIM) primary limit is reached ● 3.0 3.75 4.5 A Secondary Switch Current Limit [2] ISW(LIM2) IC latches off when secondary limit is reached − 5.1 − A Minimum Switch On-Time tSW(ON) ● 45 65 85 ns Minimum Switch Off-Time tSW(OFF) ● − 50 66 ns
OSCILLATOR FREQUENCY
R Oscillator Frequency f FSET = 10 kΩ ● 1.95 2.15 2.35 MHz SW RFSET = 110 kΩ − 200 − kHz FSET Pin Voltage VFSET RFSET = 10 kΩ − 1.00 − V
SYNCHRONIZATION
V Sync Input Logic Level SYNCL FSET/SYNC pin logic Low ● − − 0.4 V VSYNCH FSET/SYNC pin logic High ● 1.5 − − V Synchronized PWM Frequency fSWSYNC ● 260 − 2300 KHz Synchronization Input Min Off-Time tPWSYNCOFF ● 150 − − ns Synchronization Input Min On-Time tPWSYNCON ● 150 − − ns Continued on the next page… Allegro MicroSystems, LLC 7 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Applications Package Selection Guide Absolute Maximum Ratings Thermal Characteristics Typical Application – SEPIC Functional Block Diagram Pinout Diagram and Terminal List Electrical Characteristics Functional Description Enabling the IC Powering Up: LED Detection Phase Powering Up: Boost Output Undervoltage Soft Start Function Frequency Selection Synchronization Loss of External Sync Signal Switching Frequency Dithering Clock Out Function LED Current Setting PWM Dimming Pre-Emptive Boost (PEB) Analog Dimming with APWM Pin Extending LED Dimming Ratio Analog Dimming with External Voltage VDD Shutdown Fault Detection and Protection LED String Partial-Short Detect Overvoltage Protection Boost Switch Overcurrent Protection Input Overcurrent Protection and Disconnect Switch Setting the Current Sense Resistor Input UVLO Fault Protection During Operation Fault Recovery Mechanism Package Outline Drawing