Key SheetAD7176-2FREQUENTLY ASKED QUESTIONS How fast can the AD7176-2 output data? the status of the part and to change the setup to optimize The maximum ODR is 250 kSPS, but the AD7176-2 can be performance. configured to output data at an ODR from 5 SPS to 250 kSPS. Are there any ESD protection schemes that should beThe AD7176-2 has a maximum ODR of 250 kSPS but aconsidered for the AD7176-2?channel scan rate of 50 kSPS/channel. What does this mean? This converter is manufactured on a standard CMOS process; When operating the AD7176-2 with a single channel enabled, therefore, al standard practices and protection schemes that the device can output data at an ODR of up to 250 kSPS. However, apply to other CMOS devices also apply to this device. There when more than one channel is enabled, the full filter settling are ESD protection diodes on al the inputs that protect the device time must be allowed for each channel. The data rate for fully from possible ESD damage due to handling and production. To settled data is 50 kSPS. Therefore, if two channels are enabled, determine the appropriate ESD precautions, refer to the AD7176-2 the output data rate for each channel is 50 kSPS/2, or 25 kSPS. data sheet for information about the absolute maximum ratings. What digital filtering options are available?What information is provided in the noise tables of the The AD7176-2 has three filter options: Sinc5 + Sinc1, Sinc3, AD7176-2 data sheet, and what are the sources of this noise? and enhanced 50 Hz and 60 Hz filters. The Sinc5 + Sinc1 filter The noise tables in the AD7176-2 data sheet show the output is most suitable for multichannel applications in which fast rms noise for different combinations of ODRs and filters. The multiplexing is required. The Sinc3 filter is best for single- values given are for bipolar input ranges with an external 5 V channel applications running at lower output data rates. In reference. The noise values indicated are typical and are generated applications in which rejection of 50 Hz and 60 Hz is important, at an analog input voltage of 0 V based on 1000 conversion results the enhanced 50 Hz and 60 Hz rejection filters should be used at the specified ODR. It is important to note that the peak-to-peak because they provide better performance than the Sinc5 + Sinc1 resolution is calculated based on the peak-to-peak noise. or Sinc3 filter and al ow the user to trade off settling time or What per channel configurability is available on the AD7176-2? rejection to meet the needs of a given application. For more on Each channel of the AD7176-2 can be configured with different digital filters, read Section 6: Digital Filters in Mixed-Signal and DSP Design Techniques (Analog Devices, 2000). • Gain and offset correction • Filter type How do I interface with the part? • The part can be configured by using a 4-wire SPI interface; this Output data rate interface is also used as the data interface. After the AD7176-2 is • Reference source selection (internal or external) configured on the board, the SPI interface al ows the user to read Rev. 0 | Page 5 of 6 Document Outline General Description Features and Benefits Key Characteristics Fundamental Specifications Noise Operating the AD7176-2 Data Interface Accessing the ADC Register Map ADC and Interface Mode Configuration ADC Mode Register Interface Mode Register Data Modes Continuous Conversion Mode (Default) Continuous Read Mode Single Conversion Mode Typical Application Diagram Frequently Asked Questions Learn More and Start Designing Compatible Devices Package Diagram Getting Started