Datasheet AD9271 (Analog Devices) - 5

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AD9271 AD9271-25 AD9271-40 AD9271-50 Parameter1 Conditions Min Typ Max Min Typ Max Min Typ Max Unit
Harmonic Distortion Second Harmonic VGAIN = 0 V −73 −71 −71 dBFS fIN = 5 MHz at −7 dBFS Second Harmonic VGAIN = 1 V −80 −72 −68 dBFS fIN = 5 MHz at −1 dBFS Third Harmonic VGAIN = 0 V −81 −77 −74 dBFS fIN = 5 MHz at −7 dBFS Third Harmonic VGAIN = 1 V −65 −63 −66 dBFS fIN = 5 MHz at −1 dBFS Two-Tone IMD3 VGAIN = 1 V −54.6 −63.4 −68.5 dBc (2 × F1 − F2) Distortion fIN1 = 5.0 MHz at −7 dBFS, fIN2 = 6.0 MHz at −7 dBFS Channel-to-Channel −70 −70 −70 dB Crosstalk Channel-to-Channel −70 −70 −70 dB Crosstalk (Over- range Condition)3 Overload Recovery Full TGC path, 5 5 5 Degrees fIN = 1 MHz to 10 MHz, gain = 0 V to 1 V GAIN ACCURACY 25°C Gain Law Confor- 0 < VGAIN < 0.1 V +0.8 +0.8 +0.8 dB mance Error 0.1 V < VGAIN < 0.9 V −1.2 +1.2 −1.2 +1.2 −1.2 +1.2 dB 0.9 V < VGAIN < 1 V −1.2 −1.2 −1.2 dB Linear Gain Error VGAIN = 0.5 V, −1.3 +1.3 −1.3 +1.3 −1.3 +1.3 dB normalized for ideal AAF loss Channel-to-Channel 0.1 V < VGAIN < 0.9 V 0.2 0.2 0.2 dB Matching GAIN CONTROL INTERFACE Normal Operating 0 1 0 1 0 1 V Range Gain Range 0 V to 1 V, normalized 10 to 40 10 to 40 10 to 40 dB for ideal AAF loss Scale Factor 31.6 31.6 31.6 dB/V Response Time 30 dB change 350 350 350 ns CW DOPPLER MODE Transconductance LNA gain = 5/6/8 10/12/16 10/12/16 10/12/16 mA/V Common Mode CW Doppler 1.5 3.6 1.5 3.6 1.5 3.6 V output pins Input-Referred Noise LNA gain = 5/6/8, 1.8 /1.7/1.5 1.7 /1.5/1.4 1.7 /1.5/1.3 nV/√Hz Voltage RS = 0 Ω, RFB = ∞ Output DC Bias Per channel 2.4 2.4 2.4 mA Maximum Output Per channel ±2 ±2 ±2 mA p-p Swing Rev. B | Page 5 of 60 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY PRODUCT HIGHLIGHTS SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS ADC TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL IMPEDANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ULTRASOUND CHANNEL OVERVIEW Low Noise Amplifier (LNA) Active Impedance Matching LNA Noise INPUT OVERDRIVE Input Overload Protection CW DOPPLER OPERATION Crosspoint Switch TGC OPERATION Variable Gain Amplifier Gain Control VGA Noise Antialiasing Filter ADC CLOCK INPUT CONSIDERATIONS Clock Duty Cycle Considerations Clock Jitter Considerations Power Dissipation and Power-Down Mode Digital Outputs and Timing SDIO Pin SCLK Pin CSB Pin RBIAS Pin Voltage Reference Internal Reference Operation External Reference Operation SERIAL PORT INTERFACE (SPI) HARDWARE INTERFACE MEMORY MAP READING THE MEMORY MAP TABLE RESERVED LOCATIONS DEFAULT VALUES LOGIC LEVELS APPLICATIONS INFORMATION DESIGN GUIDELINES Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations EVALUATION BOARD POWER SUPPLIES INPUT SIGNALS OUTPUT SIGNALS DEFAULT OPERATION AND JUMPER SELECTION SETTINGS QUICK START PROCEDURE SCHEMATICS AND ARTWORK OUTLINE DIMENSIONS ORDERING GUIDE