Datasheet ADL5336 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | Cascadable IF VGAs with Programmable RMS Detectors |
| Pages / Page | 30 / 3 — Data Sheet. ADL5336. SPECIFICATIONS. Table 1. Parameter. Test … |
| Revision | C |
| File Format / Size | PDF / 1.2 Mb |
| Document Language | English |
Data Sheet. ADL5336. SPECIFICATIONS. Table 1. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit
Model Line for this Datasheet
Text Version of Document
Data Sheet ADL5336 SPECIFICATIONS
VS = 5 V, TA = 25°C, ZS = 200 Ω, ZL VGA1 = 200 Ω, ZL VGA2 = 100 Ω, RF input = −20 dBm at 140 MHz, maximum gain setting for both VGAs, unless otherwise noted. 1:4 balun voltage gain is not included. All dBm numbers are with respect to each VGA’s load impedance.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
OVERALL FUNCTION Frequency Range 3 dB bandwidth LF 1000 MHz Maximum Input INP1/INM1, IP2A/IM2A, IP2B/IM2B differential 8 V p-p Maximum Output OPP1/OPM1, OPP2/OPM2 differential at P1dB 5 V p-p AC Input Impedance VGA1 Differential across INP1, INM1 200 Ω VGA2 Selected Input Differential across IP2A, IM2A or IP2B, IM2B 200 Ω VGA2 Unselected Input 10 kΩ AC Output Impedance VGA1 1 Ω VGA2 3.5 Ω GAIN CONTROL INTERFACE GAIN1/GAIN2, MODE Voltage Gain Range GAIN1/GAIN2 from 0 V to 1 V VGA1 Gain Code 00 −14.6 +9.7 dB Gain Code 01 −12.2 +12 dB Gain Code 10 −10.3 +13.8 dB Gain Code 11 −8.9 +15.2 dB VGA2 Gain Code 00 −10.8 +13.4 dB Gain Code 01 −8.2 +15.9 dB Gain Code 10 −6.6 +17.7 dB Gain Code 11 −4.7 +19.5 dB Gain Step Response Time 8.5 dB Gain Step 5 ns Gain Slope VGA1 MODE = VS 35 mV/dB VGA2 35 mV/dB Gain Error VGAINx from 0.2 V to 0.8 V ±0.2 dB Input Impedance VGAINx to COM 4.6 MΩ f = 140 MHz Noise Figure VGA1, Gain Code 00, VGAIN = 1 V 7.4 dB VGA2, Gain Code 11, VGAIN = 1 V 7.1 dB Output IP3 VGA1, Gain Code 00, VGAIN = 1 V 21 (28) dBV (dBm) Output Voltage Level of 1.0 V p-p VGA1, Gain Code 11, VGAIN = 1 V 18 (25) dBV (dBm) VGA2, Gain Code 00, VGAIN = 1 V 26 (36) dBV (dBm) VGA2, Gain Code 11, VGAIN = 1 V 24 (34) dBV (dBm) Output P1dB VGA1, Gain Code 00, VGAIN = 1 V 3.5 (10.5) dBV (dBm) VGA1, Gain Code 11, VGAIN = 1 V 3.5 (10.5) dBV (dBm) VGA2, Gain Code 00, VGAIN = 1 V 4 (14) dBV (dBm) VGA2, Gain Code 11, VGAIN = 1 V 4 (14) dBV (dBm) Rev. C | Page 3 of 30 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT DESCRIPTION GAIN CONTROL INTERFACE INPUT AND OUTPUT IMPEDANCES AGC OPERATION REGISTER MAP AND CODES APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DETECTOR OUTPUT AND GAIN PIN COMMON-MODE BYPASSING SERIAL PORT CONNECTIONS MODE AND ENABLE CONNECTIONS ERROR VECTOR MAGNITUDE (EVM) EFFECT OF CAGC ON EVM AGC INSENSITIVITY TO MODULATION TYPE EFFECT OF SETPOINT ON EVM CASCADED VGA/AGC PERFORMANCE EVALUATION BOARD LAYOUT BILL OF MATERIALS (BOM) EVALUATION BOARD CONTROL SOFTWARE OUTLINE DIMENSIONS ORDERING GUIDE
VS = 5 V, TA = 25°C, ZS = 200 Ω, ZL VGA1 = 200 Ω, ZL VGA2 = 100 Ω, RF input = −20 dBm at 140 MHz, maximum gain setting for both VGAs, unless otherwise noted. 1:4 balun voltage gain is not included. All dBm numbers are with respect to each VGA’s load impedance.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
OVERALL FUNCTION Frequency Range 3 dB bandwidth LF 1000 MHz Maximum Input INP1/INM1, IP2A/IM2A, IP2B/IM2B differential 8 V p-p Maximum Output OPP1/OPM1, OPP2/OPM2 differential at P1dB 5 V p-p AC Input Impedance VGA1 Differential across INP1, INM1 200 Ω VGA2 Selected Input Differential across IP2A, IM2A or IP2B, IM2B 200 Ω VGA2 Unselected Input 10 kΩ AC Output Impedance VGA1 1 Ω VGA2 3.5 Ω GAIN CONTROL INTERFACE GAIN1/GAIN2, MODE Voltage Gain Range GAIN1/GAIN2 from 0 V to 1 V VGA1 Gain Code 00 −14.6 +9.7 dB Gain Code 01 −12.2 +12 dB Gain Code 10 −10.3 +13.8 dB Gain Code 11 −8.9 +15.2 dB VGA2 Gain Code 00 −10.8 +13.4 dB Gain Code 01 −8.2 +15.9 dB Gain Code 10 −6.6 +17.7 dB Gain Code 11 −4.7 +19.5 dB Gain Step Response Time 8.5 dB Gain Step 5 ns Gain Slope VGA1 MODE = VS 35 mV/dB VGA2 35 mV/dB Gain Error VGAINx from 0.2 V to 0.8 V ±0.2 dB Input Impedance VGAINx to COM 4.6 MΩ f = 140 MHz Noise Figure VGA1, Gain Code 00, VGAIN = 1 V 7.4 dB VGA2, Gain Code 11, VGAIN = 1 V 7.1 dB Output IP3 VGA1, Gain Code 00, VGAIN = 1 V 21 (28) dBV (dBm) Output Voltage Level of 1.0 V p-p VGA1, Gain Code 11, VGAIN = 1 V 18 (25) dBV (dBm) VGA2, Gain Code 00, VGAIN = 1 V 26 (36) dBV (dBm) VGA2, Gain Code 11, VGAIN = 1 V 24 (34) dBV (dBm) Output P1dB VGA1, Gain Code 00, VGAIN = 1 V 3.5 (10.5) dBV (dBm) VGA1, Gain Code 11, VGAIN = 1 V 3.5 (10.5) dBV (dBm) VGA2, Gain Code 00, VGAIN = 1 V 4 (14) dBV (dBm) VGA2, Gain Code 11, VGAIN = 1 V 4 (14) dBV (dBm) Rev. C | Page 3 of 30 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT DESCRIPTION GAIN CONTROL INTERFACE INPUT AND OUTPUT IMPEDANCES AGC OPERATION REGISTER MAP AND CODES APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DETECTOR OUTPUT AND GAIN PIN COMMON-MODE BYPASSING SERIAL PORT CONNECTIONS MODE AND ENABLE CONNECTIONS ERROR VECTOR MAGNITUDE (EVM) EFFECT OF CAGC ON EVM AGC INSENSITIVITY TO MODULATION TYPE EFFECT OF SETPOINT ON EVM CASCADED VGA/AGC PERFORMANCE EVALUATION BOARD LAYOUT BILL OF MATERIALS (BOM) EVALUATION BOARD CONTROL SOFTWARE OUTLINE DIMENSIONS ORDERING GUIDE
