Datasheet BC3602 (Holtek) - 2
| Manufacturer | Holtek |
| Description | Sub-1GHz Low RX Current FSK/GFSK RF Transceiver |
| Pages / Page | 61 / 2 — BC3602. Block Diagram. Pin Assignment. 24 QFN-A |
| File Format / Size | PDF / 1.3 Mb |
| Document Language | English |
BC3602. Block Diagram. Pin Assignment. 24 QFN-A
Model Line for this Datasheet
Text Version of Document
BC3602 Block Diagram
SDIO Mixer SCK CSN RFIN Digital LNA ADC Control MODEM GIO1~ BPF GIO4 VSSRF RFOUT PA Loop Filter CP/PFD CRC/FEC WOT CLDO Manchester WOR MMD V_DIG V_SX V_LNA Whitening Auto-resend/ V_XO XO DSM ACK XI Packet Synthesizer Handler ATR EP EXTLN EXTLP External Inductor
Pin Assignment
VSSRF RFOUT V_LNA RFI VSS N N C 242322 212019 V_SX 1 18 NC EXTLN 2 17 GIO4 EXTLP 3
BC3602
16 CLDO V_XO 4
24 QFN-A
15 V_DIG XO 5 14 GIO3 XI 6 13 SDIO 7 8 9 101112 C G VS C SC G LD IO SN IO O S 1 K 2 Rev. 1.00 2 July 29, 2019 Document Outline Features General Description Block Diagram Pin Assignment Pin Description Absolute Maximum Ratings D.C. Characteristics A.C. Characteristics Memory Mapping Control Register Access SFR Mapping and Bit Definition Common Area Control Register Bank 0 Control Registers Bank 1 Control Registers Bank 2 Control Registers Special Function Description Sub-1GHz RF Transceiver Serial Interface System Clock Frequency Synthesizer Modulator State Machine Calibration AGC & RSSI Packet Handler FIFO Operation Modes Receiving Packet Judgement Continuous RX Mode ARK Mode: Auto-Resend and Auto-Ack ATR Mode: Auto-Transmit-Receive Message Flowchart Examples Abbreviation Application Circuits Package Information SAW Type 24-pin QFN (3mm×3mm×0.55mm) Outline Dimensions
SDIO Mixer SCK CSN RFIN Digital LNA ADC Control MODEM GIO1~ BPF GIO4 VSSRF RFOUT PA Loop Filter CP/PFD CRC/FEC WOT CLDO Manchester WOR MMD V_DIG V_SX V_LNA Whitening Auto-resend/ V_XO XO DSM ACK XI Packet Synthesizer Handler ATR EP EXTLN EXTLP External Inductor
Pin Assignment
VSSRF RFOUT V_LNA RFI VSS N N C 242322 212019 V_SX 1 18 NC EXTLN 2 17 GIO4 EXTLP 3
BC3602
16 CLDO V_XO 4
24 QFN-A
15 V_DIG XO 5 14 GIO3 XI 6 13 SDIO 7 8 9 101112 C G VS C SC G LD IO SN IO O S 1 K 2 Rev. 1.00 2 July 29, 2019 Document Outline Features General Description Block Diagram Pin Assignment Pin Description Absolute Maximum Ratings D.C. Characteristics A.C. Characteristics Memory Mapping Control Register Access SFR Mapping and Bit Definition Common Area Control Register Bank 0 Control Registers Bank 1 Control Registers Bank 2 Control Registers Special Function Description Sub-1GHz RF Transceiver Serial Interface System Clock Frequency Synthesizer Modulator State Machine Calibration AGC & RSSI Packet Handler FIFO Operation Modes Receiving Packet Judgement Continuous RX Mode ARK Mode: Auto-Resend and Auto-Ack ATR Mode: Auto-Transmit-Receive Message Flowchart Examples Abbreviation Application Circuits Package Information SAW Type 24-pin QFN (3mm×3mm×0.55mm) Outline Dimensions
