Datasheet ADAU1961 (Analog Devices) - 7

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Data Sheet ADAU1961 Parameter Test Conditions/Comments Min Typ Max Unit
Interchannel Gain Mismatch −0.3 +0.3 dB Offset Error −22 +22 mV Gain Error −10 +10 % DAC TO HEADPHONE/EARPIECE LOUTx, ROUTx, LHP, RHP in headphone OUTPUT output mode; PO = output power per channel Total Harmonic Distortion + Noise Capless Headphone Mode −2 dBFS, 16 Ω load −61 dB −2 dBFS, 32 Ω load −63 dB Headphone Output Mode 0 dBFS, 10 kΩ load −76 dB REFERENCE Common-Mode Reference Output CM pin 1.47 1.83 V
POWER SUPPLY SPECIFICATIONS
Master clock = 12.288 MHz, input sample rate = 48 kHz, input tone = 1 kHz, ADC input @ −1 dBFS, DAC input @ 0 dBFS, −40°C < TA < +105°C, IOVDD = 3.3 V ± 10%. For total power consumption, add the IOVDD current listed in Table 3.
Table 3. Parameter Test Conditions/Comments Min Typ Max Unit
SUPPLIES Voltage DVDDOUT 1.56 V AVDD 2.97 3.3 3.65 V IOVDD 2.97 3.3 3.65 V Digital I/O Current (IOVDD) 20 pF capacitive load on all digital pins Slave Mode fS = 48 kHz 0.48 mA fS = 96 kHz 0.9 mA fS = 8 kHz 0.13 mA Master Mode fS = 48 kHz 1.51 mA fS = 96 kHz 3 mA fS = 8 kHz 0.27 mA Analog Current (AVDD) Record Stereo Differential to ADC PLL bypass 5.24 mA Integer PLL 6.57 mA DAC Stereo Playback to Line Output 10 kΩ load PLL bypass 5.55 mA Integer PLL 6.90 mA DAC Stereo Playback to Headphone 32 Ω load PLL bypass 30.9 mA Integer PLL 32.25 mA DAC Stereo Playback to Capless Headphone 32 Ω load PLL bypass 56.75 mA Integer PLL 58 mA Rev. A | Page 7 of 76 Document Outline Features Applications General Description Functional Block Diagram Revision History Specifications Analog Performance Specifications, TA = 25 C Analog Performance Specifications, −40 C < TA < +105 C Power Supply Specifications Digital Filters Digital Input/Output Specifications Digital Timing Specifications Digital Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics System Block Diagrams Theory of Operation Startup, Initialization, and Power Power-Up Sequence Power Reduction Modes Digital Power Supply Input/Output Power Supply Clock Generation and Management Case 1: PLL Is Bypassed Case 2: PLL Is Used PLL Lock Acquisition Clocking and Sampling Rates Core Clock Sampling Rates PLL Integer Mode Fractional Mode Record Signal Path Input Signal Paths Analog Microphone Inputs Analog Line Inputs Digital Microphone Input Microphone Bias Analog-to-Digital Converters ADC Full-Scale Level Digital ADC Volume Control High-Pass Filter Automatic Level Control (ALC) ALC Parameters Noise Gate Function Playback Signal Path Output Signal Paths Routing Flexibility Headphone Output Capless Headphone Configuration Headphone Output Power-Up/Power-Down Sequencing Ground-Centered Headphone Configuration Jack Detection Pop-and-Click Suppression Line Outputs Control Ports Burst Mode Writing and Reading I2C Port Addressing I2C Read and Write Operations SPI Port Chip Address R/W Subaddress Data Bytes Serial Data Input/Output Ports Applications Information Power Supply Bypass Capacitors GSM Noise Filter Grounding Exposed Pad PCB Design Control Registers Control Register Details R0: Clock Control, 16,384 (0x4000) R1: PLL Control, 16,386 (0x4002) R2: Digital Microphone/Jack Detection Control, 16,392 (0x4008) R4: Record Mixer Left (Mixer 1) Control 0, 16,394 (0x400A) R5: Record Mixer Left (Mixer 1) Control 1, 16,395 (0x400B) R6: Record Mixer Right (Mixer 2) Control 0, 16,396 (0x400C) R7: Record Mixer Right (Mixer 2) Control 1, 16,397 (0x400D) R8: Left Differential Input Volume Control, 16,398 (0x400E) R9: Right Differential Input Volume Control, 16,399 (0x400F) R10: Record Microphone Bias Control, 16,400 (0x4010) R11: ALC Control 0, 16,401 (0x4011) R12: ALC Control 1, 16,402 (0x4012) R13: ALC Control 2, 16,403 (0x4013) R14: ALC Control 3, 16,404 (0x4014) R15: Serial Port Control 0, 16,405 (0x4015) R16: Serial Port Control 1, 16,406 (0x4016) R17: Converter Control 0, 16,407 (0x4017) R18: Converter Control 1, 16,408 (0x4018) R19: ADC Control, 16,409 (0x4019) R20: Left Input Digital Volume, 16,410 (0x401A) R21: Right Input Digital Volume, 16,411 (0x401B) R22: Playback Mixer Left (Mixer 3) Control 0, 16,412 (0x401C) R23: Playback Mixer Left (Mixer 3) Control 1, 16,413 (0x401D) R24: Playback Mixer Right (Mixer 4) Control 0, 16,414 (0x401E) R25: Playback Mixer Right (Mixer 4) Control 1, 16,415 (0x401F) R26: Playback L/R Mixer Left (Mixer 5) Line Output Control, 16,416 (0x4020) R27: Playback L/R Mixer Right (Mixer 6) Line Output Control, 16,417 (0x4021) R28: Playback L/R Mixer Mono Output (Mixer 7) Control, 16,418 (0x4022) R29: Playback Headphone Left Volume Control, 16,419 (0x4023) R30: Playback Headphone Right Volume Control, 16,420 (0x4024) R31: Playback Line Output Left Volume Control, 16,421 (0x4025) R32: Playback Line Output Right Volume Control, 16,422 (0x4026) R33: Playback Mono Output Control, 16,423 (0x4027) R34: Playback Pop/Click Suppression, 16,424 (0x4028) R35: Playback Power Management, 16,425 (0x4029) R36: DAC Control 0, 16,426 (0x402A) R37: DAC Control 1, 16,427 (0x402B) R38: DAC Control 2, 16,428 (0x402C) R39: Serial Port Pad Control, 16,429 (0x402D) R40: Control Port Pad Control 0, 16,431 (0x402F) R41: Control Port Pad Control 1, 16,432 (0x4030) R42: Jack Detect Pin Control, 16,433 (0x4031) R67: Dejitter Control, 16,438 (0x4036) Outline Dimensions Ordering Guide Automotive Products