Datasheet LTC7060 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | 100V Half Bridge Driver with Floating Grounds and Programmable Dead-Time |
| Pages / Page | 18 / 7 — PIN FUNCTIONS VCC:. TG:. DT:. BGVCC:. PWM:. BGRTN:. EN:. BG:. FLT:. BST:. … |
| File Format / Size | PDF / 1.4 Mb |
| Document Language | English |
PIN FUNCTIONS VCC:. TG:. DT:. BGVCC:. PWM:. BGRTN:. EN:. BG:. FLT:. BST:. NC:. SW:. SGND:
Model Line for this Datasheet
Text Version of Document
LTC7060
PIN FUNCTIONS VCC:
VCC Supply. IC bias supply referred to the SGND pin.
TG:
Top MOSFET Gate Driver Output. This pin drives the An internal 4.5V supply is generated from the VCC supply gate of the N-channel MOSFET between SW and BST. to bias most of the internal circuitry. A bypass capacitor
DT:
Dead-Time Program Pin Referred to the SGND Pin. with a minimum value of 0.1uF should be tied between A single resistor from this pin to SGND sets the BG/TG this pin and the SGND pin. low to TG/BG high propagation delay. See the operation
BGVCC:
Bottom MOSFET Driver Supply. The bottom section for details. MOSFET gate driver is biased between this pin and the
PWM:
Three-State Gate Driver Input Signal Referred to BGRTN pin. An external capacitor should be tied between the SGND Pin. The TG/BG state is determined by the volt- this pin and BGRTN and placed close to the IC. age at this pin. If this pin is floating, an internal resistor
BGRTN:
Bottom MOSFET Driver Return. The bottom divider triggers the High-Z mode in which both BG and gate driver is biased between BGVCC and BGRTN. Kelvin TG are turned off. Trace capacitance on this pin should connect BGRTN to the bottom MOSFET source pin for be minimized. high noise immunity. The voltage difference between the
EN:
Enable Control Input Pin Referred to the SGND Pin. BGRTN pin and the SGND can be –10V to 100V. A voltage on this pin above 1.2V enables the gate drivers.
BG:
Bottom MOSFET Gate Driver Output. This pin drives The TG and BG pins are both in the low state if this pin the gate of the N-channel MOSFET between BGRTN and is logic low. BGVCC.
FLT:
Open Drain Fault Output Pin Referred to the SGND
BST:
Top MOSFET Driver Supply. The top MOSFET gate Pin. Open-drain output that pul s to SGND during VCC driver is biased between this pin and the SW pin. An exter- UVLO/OVLO and floating supplies UVLO condition. The nal capacitor should be tied between this pin and the SW typical pull-down resistance is 60Ω. pin and placed close to the IC.
NC:
No Internal Connection. Always keep this pin floating.
SW:
Top MOSFET Driver Return. The top gate driver is It is intentionally skipped to isolate adjacent high voltage biased between BST and SW. Kelvin connect SW to the top pins. MOSFET source pin for high noise immunity. The voltage dif-
SGND:
Chip Ground. The exposed pad must be soldered ference between the SW pin and SGND can be –10V to 100V. to the PCB ground for electrical contact and for rated thermal performance. Rev. 0 For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Operation Applications InformatioN Typical Applications Package Description Typical Application Related Parts
PIN FUNCTIONS VCC:
VCC Supply. IC bias supply referred to the SGND pin.
TG:
Top MOSFET Gate Driver Output. This pin drives the An internal 4.5V supply is generated from the VCC supply gate of the N-channel MOSFET between SW and BST. to bias most of the internal circuitry. A bypass capacitor
DT:
Dead-Time Program Pin Referred to the SGND Pin. with a minimum value of 0.1uF should be tied between A single resistor from this pin to SGND sets the BG/TG this pin and the SGND pin. low to TG/BG high propagation delay. See the operation
BGVCC:
Bottom MOSFET Driver Supply. The bottom section for details. MOSFET gate driver is biased between this pin and the
PWM:
Three-State Gate Driver Input Signal Referred to BGRTN pin. An external capacitor should be tied between the SGND Pin. The TG/BG state is determined by the volt- this pin and BGRTN and placed close to the IC. age at this pin. If this pin is floating, an internal resistor
BGRTN:
Bottom MOSFET Driver Return. The bottom divider triggers the High-Z mode in which both BG and gate driver is biased between BGVCC and BGRTN. Kelvin TG are turned off. Trace capacitance on this pin should connect BGRTN to the bottom MOSFET source pin for be minimized. high noise immunity. The voltage difference between the
EN:
Enable Control Input Pin Referred to the SGND Pin. BGRTN pin and the SGND can be –10V to 100V. A voltage on this pin above 1.2V enables the gate drivers.
BG:
Bottom MOSFET Gate Driver Output. This pin drives The TG and BG pins are both in the low state if this pin the gate of the N-channel MOSFET between BGRTN and is logic low. BGVCC.
FLT:
Open Drain Fault Output Pin Referred to the SGND
BST:
Top MOSFET Driver Supply. The top MOSFET gate Pin. Open-drain output that pul s to SGND during VCC driver is biased between this pin and the SW pin. An exter- UVLO/OVLO and floating supplies UVLO condition. The nal capacitor should be tied between this pin and the SW typical pull-down resistance is 60Ω. pin and placed close to the IC.
NC:
No Internal Connection. Always keep this pin floating.
SW:
Top MOSFET Driver Return. The top gate driver is It is intentionally skipped to isolate adjacent high voltage biased between BST and SW. Kelvin connect SW to the top pins. MOSFET source pin for high noise immunity. The voltage dif-
SGND:
Chip Ground. The exposed pad must be soldered ference between the SW pin and SGND can be –10V to 100V. to the PCB ground for electrical contact and for rated thermal performance. Rev. 0 For more information www.analog.com 7 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Operation Applications InformatioN Typical Applications Package Description Typical Application Related Parts
