Datasheet ADA4084-1, ADA4084-2, ADA4084-4 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | 30 V, Low Noise, Rail-to-Rail Input/Output, Low Power Operational Single Amplifier |
| Pages / Page | 36 / 7 — Data Sheet. ADA4084-1/ADA4084-2/ADA4084-4. ABSOLUTE MAXIMUM RATINGS Table … |
| Revision | I |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
Data Sheet. ADA4084-1/ADA4084-2/ADA4084-4. ABSOLUTE MAXIMUM RATINGS Table 5. THERMAL RESISTANCE. Parameter. Rating
Model Line for this Datasheet
Text Version of Document
Data Sheet ADA4084-1/ADA4084-2/ADA4084-4 ABSOLUTE MAXIMUM RATINGS Table 5. THERMAL RESISTANCE Parameter Rating
θJA is specified for the device soldered on a 4-layer JEDEC Supply Voltage ±18 V standard printed circuit board (PCB) with zero airflow. Input Voltage V− ≤ VIN ≤ V+ Differential Input Voltage1 ±0.6 V
Table 6. Thermal Resistance
Output Short-Circuit Duration to GND Indefinite
Package Type θJA θJC Unit
Storage Temperature Range −65°C to +150°C 5-Lead SOT-23 (RJ-5) 219.4 155.6 °C/W Operating Temperature Range −40°C to +125°C 8-Lead SOIC_N (R-8) 121 43 °C/W Junction Temperature Range −65°C to +150°C 8-Lead MSOP (RM-8) 142 45 °C/W Lead Temperature (Soldering 60 sec) 300°C 8-Lead LFCSP (CP-8-11)1, 3 84 40 °C/W ESD 14-Lead TSSOP (RU-14) 112 43 °C/W Human Body Model2 4.5 kV 16-Lead LFCSP (CP-16-17)2, 3 55 30 °C/W Machine Model3 200 V 1 Values are based on 4-layer (2S2P) JEDEC standard PCB, with four thermal Field-Induced Charged-Device Model 1.25 kV vias. Exposed pad soldered to PCB. (FICDM)4 2 Values are based on 4-layer (2S2P) JEDEC standard PCB, with nine thermal vias. Exposed pad soldered to PCB. 1 For input differential voltages greater than 0.6 V, limit the input current to 3 θJC measured on top of package. less than 5 mA to prevent degradation or destruction of the input devices. 2 Applicable standard: MIL-STD-883, Method 3015.7. 3 Applicable standard: JESD22-A115-A (ESD machine model standard of
ESD CAUTION
JEDEC). 4 Applicable standard: JESD22-C101-C (ESD FICDM standard of JEDEC). Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
VCC R4 R3 R6 Q24 Q23 D2 D1 Q1 Q2 MIRROR D100 FOLDED Q4 V D101 Q3 CASCADE OUT Q13 R7 C2 D5 D4 VBIAS Q18 R5 C1 Q19 R1 R2 Q21
002
D20 VEE
08237- Figure 2. Simplified Schematic Rev. I | Page 7 of 36 Document Outline FEATURES APPLICATIONS PIN CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS ±1.5 V CHARACTERISTICS ±5 V CHARACTERISTICS ±15 V CHARACTERISTICS APPLICATIONS INFORMATION FUNCTIONAL DESCRIPTION START-UP CHARACTERISTICS INPUT PROTECTION OUTPUT PHASE REVERSAL DESIGNING LOW NOISE CIRCUITS IN SINGLE-SUPPLY APPLICATIONS COMPARATOR OPERATION LONG-TERM DRIFT TEMPERATURE HYSTERESIS OUTLINE DIMENSIONS ORDERING GUIDE
θJA is specified for the device soldered on a 4-layer JEDEC Supply Voltage ±18 V standard printed circuit board (PCB) with zero airflow. Input Voltage V− ≤ VIN ≤ V+ Differential Input Voltage1 ±0.6 V
Table 6. Thermal Resistance
Output Short-Circuit Duration to GND Indefinite
Package Type θJA θJC Unit
Storage Temperature Range −65°C to +150°C 5-Lead SOT-23 (RJ-5) 219.4 155.6 °C/W Operating Temperature Range −40°C to +125°C 8-Lead SOIC_N (R-8) 121 43 °C/W Junction Temperature Range −65°C to +150°C 8-Lead MSOP (RM-8) 142 45 °C/W Lead Temperature (Soldering 60 sec) 300°C 8-Lead LFCSP (CP-8-11)1, 3 84 40 °C/W ESD 14-Lead TSSOP (RU-14) 112 43 °C/W Human Body Model2 4.5 kV 16-Lead LFCSP (CP-16-17)2, 3 55 30 °C/W Machine Model3 200 V 1 Values are based on 4-layer (2S2P) JEDEC standard PCB, with four thermal Field-Induced Charged-Device Model 1.25 kV vias. Exposed pad soldered to PCB. (FICDM)4 2 Values are based on 4-layer (2S2P) JEDEC standard PCB, with nine thermal vias. Exposed pad soldered to PCB. 1 For input differential voltages greater than 0.6 V, limit the input current to 3 θJC measured on top of package. less than 5 mA to prevent degradation or destruction of the input devices. 2 Applicable standard: MIL-STD-883, Method 3015.7. 3 Applicable standard: JESD22-A115-A (ESD machine model standard of
ESD CAUTION
JEDEC). 4 Applicable standard: JESD22-C101-C (ESD FICDM standard of JEDEC). Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
VCC R4 R3 R6 Q24 Q23 D2 D1 Q1 Q2 MIRROR D100 FOLDED Q4 V D101 Q3 CASCADE OUT Q13 R7 C2 D5 D4 VBIAS Q18 R5 C1 Q19 R1 R2 Q21
002
D20 VEE
08237- Figure 2. Simplified Schematic Rev. I | Page 7 of 36 Document Outline FEATURES APPLICATIONS PIN CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS ±1.5 V CHARACTERISTICS ±5 V CHARACTERISTICS ±15 V CHARACTERISTICS APPLICATIONS INFORMATION FUNCTIONAL DESCRIPTION START-UP CHARACTERISTICS INPUT PROTECTION OUTPUT PHASE REVERSAL DESIGNING LOW NOISE CIRCUITS IN SINGLE-SUPPLY APPLICATIONS COMPARATOR OPERATION LONG-TERM DRIFT TEMPERATURE HYSTERESIS OUTLINE DIMENSIONS ORDERING GUIDE
