Datasheet ADE7816 (Analog Devices) - 5

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Data Sheet ADE7816 TIMING CHARACTERISTICS
VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 16.384 MHz, TMIN to TMAX = −40°C to +85°C. Note that, within the timing tables and diagrams, the dual function pin names are referenced by the relevant function only; see the Pin Configuration and Function Descriptions section for full pin mnemonics and function descriptions.
I2C-Compatible Interface Timing Table 2. I2C-Compatible Interface Timing Parameters Standard Mode Fast Mode Parameter Symbol Min Max Min Max Unit
SCL Clock Frequency fSCL 0 100 0 400 kHz Hold Time (Repeated) Start Condition tHD;STA 4.0 0.6 μs Low Period of SCL Clock tLOW 4.7 1.3 μs High Period of SCL Clock tHIGH 4.0 0.6 μs Setup Time for Repeated Start Condition tSU;STA 4.7 0.6 μs Data Hold Time tHD;DAT 0 3.45 0 0.9 μs Data Setup Time tSU;DAT 250 100 ns Rise Time of Both SDA and SCL Signals tR 1000 20 300 ns Fall Time of Both SDA and SCL Signals tF 300 20 300 ns Setup Time for Stop Condition tSU;STO 4.0 0.6 μs Bus Free Time Between a Stop and Start Condition tBUF 4.7 1.3 μs Pulse Width of Suppressed Spikes tSP N/A1 50 ns 1 N/A means not applicable.
SDA t t t BUF F SU;DAT tHD;STA t t SP R tR tR tLOW SCL tHD;STAtHD;DAT t t t SU;STA SU;STO HIGH
002
START REPEATED START STOP START CONDITION CONDITION CONDITION CONDITION
10390- Figure 2. I2C-Compatible Interface Timing Rev. B | Page 5 of 48 Document Outline Features General Description Functional Block Diagram Revision History Specifications Timing Characteristics I2C-Compatible Interface Timing SPI Interface Timing HSDC Interface Timing Load Circuit for All Timing Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuit Terminology Quick Start Inputs Power and Ground VDD and AGND, DGND Reference Circuit REFIN/OUT Reset Hardware Reset Software Reset Functionality CLKIN and CLKOUT Analog Inputs Input Pins PGA Gain Digital Integrator Antialiasing Filters Energy Measurements Starting and Stopping the DSP Active Energy Measurement Definition of Active Power and Active Energy Active Energy Registers Active Energy Threshold Energy Accumulation and Register Roll-Over Reactive Energy Measurement Definition of Reactive Power and Reactive Energy Reactive Energy Registers Reactive Energy Threshold Reactive Energy Accumulation and Register Roll-Over Line Cycle Accumulation Mode Root Mean Square Measurement No Load Detection Setting the No Load Thresholds No Load Interrupt Energy Calibration Channel Matching Energy Gain Calibration Energy Offset Calibration Energy Phase Calibration RMS Offset Calibration Power Quality Features Selecting a Current Channel Group Instantaneous Waveforms Zero-Crossing Detection Zero-Crossing Detection Zero-Crossing Timeout Peak Detection Setting the PEAKCYC Register Overcurrent and Overvoltage Detection Setting the OVLVL and OILVL Registers Overvoltage and Overcurrent Interrupts Indication of Power Direction Angle Measurements Period Measurement Voltage Sag Detection Setting the SAGCYC Register Setting the SAGLVL Register Voltage Sag Interrupt Checksum Layout Guidelines Crystal Circuit Outputs Interrupts Communication Serial Interface Selection I2C-Compatible Interface I2C Write Operation I2C Read Operation SPI-Compatible Interface SPI Read Operation SPI Write Operation HSDC Interface Registers Register Protection Register Format Register Maps Register Descriptions Interrupt Enable and Interrupt Status Registers Outline Dimensions Ordering Guide