Datasheet AD8363 (Analog Devices) - 9

Data Sheet AD8363 TYPICAL PERFORMANCE CHARACTERISTICS
VPOS = 5 V, ZO = 50 Ω, single-ended input drive, VOUT connected to VSET, VTGT = 1.4 V, CLPF = 3.9 nF, CHPF = 2.7 nF, TA = +25°C (black), −40°C (blue), +85°C (red), where appropriate. Error calculated using 3-point calibration at 0 dBm, −10 dBm, and −40 dBm, unless otherwise indicated. Input RF signal is a sine wave (CW), unless otherwise indicated.
4.0 4 4.0 4 3.5 3 3.5 3 3.0 2 3.0 2 2.5 1 2.5 1 B) B) d d (V) (V) 2.0 0 R ( 2.0 0 R ( UT UT O O V RRO V RRO 1.5 –1 E 1.5 –1 E 1.0 –2 1.0 –2 0.5 –3 0.5 –3 0 –4 0 –4 –60 –50 –40 –30 –20 –10 0 10
103
–60 –50 –40 –30 –20 –10 0 10
106
PIN (dBm) P
07368-
IN (dBm)
07368- Figure 3. VOUT and Log Conformance vs. Input Power and Figure 6. Distribution of VOUT and Error with Respect to 25°C Ideal Line over Temperature at 100 MHz Temperature vs. Input Amplitude at 100 MHz, CW
4.0 4 4.0 4 3.5 3 3.5 3 3.0 2 3.0 2 2.5 1 2.5 1 B) B) d d (V) 2.0 0 R ( (V) 2.0 0 R ( UT UT O O V RRO V RRO 1.5 –1 E 1.5 –1 E 1.0 –2 1.0 –2 0.5 –3 0.5 –3 0 –4 0 –4 –60 –50 –40 –30 –20 –10 0 10
104
–60 –50 –40 –30 –20 –10 0 10
107
PIN (dBm)
07368-
PIN (dBm)
07368- Figure 4. VOUT and Log Conformance Error with Respect to 25°C Ideal Line Figure 7. Distribution of VOUT and Error with Respect to 25°C Ideal Line over over Temperature vs. Input Amplitude at 900 MHz, CW, Typical Device Temperature vs. Input Amplitude at 900 MHz, CW
4.0 4 4.0 4 3.5 3 3.5 3 3.0 2 3.0 2 2.5 1 2.5 1 B) B) d d (V) (V) 2.0 0 R ( 2.0 0 R ( UT UT O O V RRO V RRO 1.5 –1 E 1.5 –1 E 1.0 –2 1.0 –2 0.5 –3 0.5 –3 0 –4 0 –4 –60 –50 –40 –30 –20 –10 0 10
105
–60 –50 –40 –30 –20 –10 0 10
108
PIN (dBm)
07368-
PIN (dBm)
07368- Figure 5. VOUT and Log Conformance Error with Respect to 25°C Ideal Line Figure 8. Distribution of VOUT and Error with Respect to 25°C Ideal Line over over Temperature vs. Input Amplitude at 1.90 GHz, CW, Typical Device Temperature vs. Input Amplitude at 1.90 GHz, CW Rev. B | Page 9 of 29 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SQUARE LAW DETECTOR AND AMPLITUDE TARGET RF INPUT INTERFACE CHOICE OF RF INPUT PIN SMALL SIGNAL LOOP RESPONSE TEMPERATURE SENSOR INTERFACE VREF INTERFACE TEMPERATURE COMPENSATION INTERFACE POWER-DOWN INTERFACE VSET INTERFACE OUTPUT INTERFACE VTGT INTERFACE MEASUREMENT MODE BASIC CONNECTIONS SYSTEM CALIBRATION AND ERROR CALCULATION OPERATION TO 125°C OUTPUT VOLTAGE SCALING OFFSET COMPENSATION, MINIMUM CLPF, AND MAXIMUM CHPF CAPACITANCE VALUES CHOOSING A VALUE FOR CLPF RF PULSE RESPONSE AND VTGT CONTROLLER MODE BASIC CONNECTIONS CONSTANT OUTPUT POWER OPERATION DESCRIPTION OF RF CHARACTERIZATION EVALUATION AND CHARACTERIZATION CIRCUIT BOARD LAYOUTS ASSEMBLY DRAWINGS OUTLINE DIMENSIONS ORDERING GUIDE