Datasheet ADRV9026 (Analog Devices) - 9

Data Sheet ADRV9026 Parameter Symbol Min Typ Max Unit Test Conditions/Comments
3800 MHz −12.0 dBm 4800 MHz −11.3 dBm 5700 MHz −9.5 dBm Input Impedance ZIN 100 Ω Differential Input Source VSWR 3 Input Port Return Loss 10 dB Unmatched differential port return loss Integrated Noise 450 MHz Bandwidth −58.5 dBFS Sample rate at maximum value integrated from 500 kHz to 225 MHz, no input signal 491.52 MHz Bandwidth (Nyquist) −57.5 dBFS Sample rate at maximum value integrated from 500 kHz to 245.76 MHz, no input signal Second-Order Input Intermodu- IIP2 Maximum observation receiver gain; test lation Intercept Point condition: PHIGH − 11 dB/tone 800 MHz 55 dBm 1800 MHz 53 dBm 2600 MHz 55 dBm 3800 MHz 48 dBm 4800 MHz 45 dBm 5700 MHz 55 dBm Third-Order Input Intermodulation IIP3 Maximum observation receiver gain; test Intercept Point condition: PHIGH − 11 dB/tone Narrow Band IIP3NB IM3 product < 130 MHz at baseband; test condition: PHIGH − 11 dB/tone, 491.52 MSPS 800 MHz 13.6 dBm 1800 MHz 15 dBm 2600 MHz 16.5 dBm 3800 MHz 18 dBm 4800 MHz 18 dBm 5700 MHz 18 dBm Wide Band IIP3WB IM3 products > 130 MHz at baseband; test condition: PHIGH −11 dB/tone, 491.52 MSPS 800 MHz 7.8 dBm 1800 MHz 13 dBm 2600 MHz 11 dBm 3800 MHz 13 dBm 4800 MHz 13 dBm 5700 MHz 14 dBm Third-Order Intermodulation IM3 Product Narrow Band IM3NB IM3 product < 130 MHz at baseband; test condition: two tones, each at PHIGH − 11 dB, 491.52 MSPS 800 MHz −74 dBc 1800 MHz −79 dBc 2600 MHz −78.6 dBc 3800 MHz −80.4 dBc 4800 MHz −79.8 dBc 5700 MHz −76 dBc Wide Band IM3WB IM3 product > 130 MHz at baseband; test condition: two tones, each at PHIGH − 11 dB, 491.52 MSPS 800 MHz −62.4 dBc 1800 MHz −70 dBc 2600 MHz −67.6 dBc 3800 MHz −70.4 dBc Rev. A | Page 9 of 118 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Transmitters and Receivers Synthesizers, Auxiliary Converters, and Clock References Digital Specifications Power Supply Specifications Current Consumption TDD Operation—Four Receiver Channels Enabled TDD Operation—Four Transmitter and One Observation Receiver Channels Enabled FDD Operation—LO1 and LO2, Four Receiver, Four Transmitter, and One Observation Receiver Channels Enabled Digital Interface and Timing Specifications Absolute Maximum Ratings Junction Temperature Reflow Profile Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics 800 MHz Band 1800 MHz Band 2600 MHz Band 3800 MHz Band 4800 MHz Band 5700 MHz Band Theory of Operation General Transmitter Receiver Observation Receiver Clock Input Synthesizers RF Synthesizers Auxiliary Synthesizer Clock Synthesizer SPI Interface GPIO_x Pins Auxiliary Converters GPIO_ANA_x/AUXDAC_x AUXADC_x JTAG Boundary Scan Applications Information Power Supply Sequence Data Interface Outline Dimensions Ordering Guide