Datasheet ADRV9009 (Analog Devices) - 7

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Data Sheet ADRV9009 Parameter Symbol Min Typ Max Unit Test Conditions/Comments
Error Vector Magnitude EVM (Third Generation Partnership Project (3GPP) Test Signals) 75 MHz LO 0.5 % 300 kHz RF PLL loop bandwidth, test equipment phase noise performance limited 1900 MHz LO 0.7 % 50 kHz RF PLL loop bandwidth 3800 MHz LO 0.7 % 300 kHz RF PLL loop bandwidth 5900 MHz LO 1.1 % 300 kHz RF PLL loop bandwidth Output Impedance ZOUT 50 Ω Differential (see Figure 427) OBSERVATION RECEIVER ORx Center Frequency 75 6000 MHz Gain Range 30 dB Third-order input intermodulation intercept point (IIP3) improves decibel for decibel for the first 18 dB of gain attenuation, QEC performance optimi- zed for 0 dB to 6 dB of attenuation only Analog Gain Step 0.5 dB For attenuator steps from 0 dB to 6 dB Peak-to-Peak Gain 1 dB 450 MHz bandwidth, compensated by Deviation programmable FIR filter Gain Slope ±0.1 dB Any 20 MHz bandwidth span, compens- ated by programmable FIR filter Deviation from Linear Phase 1 Degree 450 MHz RF bandwidth s Observation Receiver 450 MHz Bandwidth Observation Receiver Alias 60 dB Due to digital filters Band Rejection Maximum Useable Input PHIGH 0 dB attenuation, increases decibel for Level decibel with attenuation, CW corresponds to −1 dBFS at ADC −11 dBm 75 MHz < f ≤ 3000 MHz −9.5 dBm 3000 MHz < f ≤ 4800 MHz −8 dBm 4800 MHz < f ≤ 6000 MHz Integrated Noise −58.5 dBFS 450 MHz integration bandwidth −57.5 dBFS 491.52 MHz integration bandwidth Second-Order Input IIP2 62 dBm Maximum observation receiver gain, Intermodulation (PHIGH − 14 dB) per tone (see the Intercept Point Terminology section), 75 MHz < f ≤ 600 MHz 62 dBm Maximum observation receiver gain, (PHIGH − 8 dB) per tone (see the Terminology section), 600 MHz < f ≤ 3000 MHz Third-Order Input IIP3 Intermodulation Intercept Point Narrow Band 4 dBm 75 MHz < f ≤ 300 MHz, test condition: (PHIGH − 14) dB per tone 11 dBm 300 MHz < f ≤ 600 MHz, (PHIGH − 14) dB per tone Third-order intermodulation product (IM3) product < 130 MHz at baseband, (PHIGH − 8) dB per tone 12 dBm 600 MHz < f ≤ 3000 MHz 12 dBm 3000 MHz < f ≤ 4800 MHz 11 dBm 4800 MHz < f ≤ 6000 MHz Rev. B | Page 7 of 127 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Current and Power Consumption Specifications Timing Diagrams Absolute Maximum Ratings Reflow Profile Thermal Management Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics 75 MHz to 525 MHz Band 650 MHz to 3000 MHz Band 3400 MHz to 4800 MHz Band 5100 MHz to 5900 MHz Band Transmitter Output Impedance Observation Receiver Input Impedance Receiver Input Impedance Terminology Theory of Operation Transmitter Receiver Observation Receiver Clock Input Synthesizers RF PLL Clock PLL SPI JTAG Boundary Scan Power Supply Sequence GPIO_x Pins Auxiliary Converters AUXADC_x Auxiliary DAC x JESD204B Data Interface Applications Information PCB Layout and Power Supply Recommendations Overview PCB Material and Stackup Selection Fanout and Trace Space Guidelines Component Placement and Routing Guidelines Signals with Highest Routing Priority Signals with Second Routing Priority Signals with Lowest Routing Priority RF and JESD204B Transmission Line Layout RF Routing Guidelines Transmitter Balun DC Feed Supplies JESD204B Trace Routing Recommendations Routing Recommendations Stripline Transmission Lines vs. Microstrip Transmission Lines Isolation Techniques Used on the ADRV9009-W/PCBZ Isolation Goals Isolation Between JESD204B Lines RF Port Interface Information RF Port Impedance Data Advanced Design System (ADS) Setup Using the DataAccessComponent and SEDZ File Transmitter Bias and Port Interface General Receiver Path Interface Impedance Matching Network Examples Outline Dimensions Ordering Guide