Datasheet ADCMP600, ADCMP601, ADCMP602 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators |
| Pages / Page | 16 / 7 — ADCMP600/ADCMP601/ADCMP602. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. … |
| Revision | A |
| File Format / Size | PDF / 291 Kb |
| Document Language | English |
ADCMP600/ADCMP601/ADCMP602. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. CCI/VCCO. VCCI/VCCO. ADCMP600. ADCMP601. VCCI 1. VCCO. GND
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Text Version of Document
ADCMP600/ADCMP601/ADCMP602 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Q 1 6 V Q CCI/VCCO 1 5 VCCI/VCCO ADCMP600 ADCMP601 VCCI 1 8 VCCO GND ADCMP602 2 TOP VIEW GND 2 5 TOP VIEW LE/HYS VP 2 7 Q (Not to Scale) (Not to Scale) TOP VIEW VN 3 6 GND (Not to Scale) V
004
P 3 4 V
002 003
N VP 3 4 VN SDN 4 5 LE/HYS
05914- 05914- 05914- Figure 3. ADCMP600 Pin Configuration Figure 4. ADCMP601 Pin Configuration Figure 5. ADCMP602 Pin Configuration
Table 5. ADCMP600 (SOT-23-5 and SC70-5) Pin Function Descriptions Pin No. Mnemonic Description
1 Q Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, V , is greater P than the analog voltage at the inverting input, V . N 2 GND Negative Supply Voltage. 3 V Noninverting Analog Input. P 4 V Inverting Analog Input. N 5 V /V Input Section Supply/Output Section Supply. Shared pin. CCI CCO
Table 6. ADCMP601 (SC70-6) Pin Function Descriptions Pin No. Mnemonic Description
1 Q Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, V , is greater P than the analog voltage at the inverting input, V , if the comparator is in compare mode. N 2 GND Negative Supply Voltage. 3 V Noninverting Analog Input. P 4 V Inverting Analog Input. N 5 LE/HYS Latch/Hysteresis Control. Bias with resistor or current for hysteresis adjustment; drive low to latch. 6 V /V Input Section Supply/Output Section Supply. Shared pin. CCI CCO
Table 7. ADCMP602 (MSOP-8) Pin Function Descriptions Pin No. Mnemonic Description
1 V Input Section Supply. CCI 2 V Noninverting Analog Input. P 3 V Inverting Analog Input. N 4 S Shutdown. Drive this pin low to shut down the device. DN 5 LE/HYS Latch/Hysteresis Control. Bias with resistor or current for hysteresis adjustment; drive low to latch. 6 GND Negative Supply Voltage. 7 Q Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, V , is greater P than the analog voltage at the inverting input, V , if the comparator is in compare mode. N 8 V Output Section Supply. CCO Rev. A | Page 7 of 16 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Characteristics Timing Information Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Application Information Power/Ground Layout and Bypassing TTL-/CMOS-Compatible Output Stage Using/Disabling the Latch Feature Optimizing Performance Comparator Propagation Delay Dispersion Comparator Hysteresis Crossover Bias Point Minimum Input Slew Rate Requirement Typical Application Circuits Outline Dimensions Ordering Guide
004
P 3 4 V
002 003
N VP 3 4 VN SDN 4 5 LE/HYS
05914- 05914- 05914- Figure 3. ADCMP600 Pin Configuration Figure 4. ADCMP601 Pin Configuration Figure 5. ADCMP602 Pin Configuration
Table 5. ADCMP600 (SOT-23-5 and SC70-5) Pin Function Descriptions Pin No. Mnemonic Description
1 Q Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, V , is greater P than the analog voltage at the inverting input, V . N 2 GND Negative Supply Voltage. 3 V Noninverting Analog Input. P 4 V Inverting Analog Input. N 5 V /V Input Section Supply/Output Section Supply. Shared pin. CCI CCO
Table 6. ADCMP601 (SC70-6) Pin Function Descriptions Pin No. Mnemonic Description
1 Q Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, V , is greater P than the analog voltage at the inverting input, V , if the comparator is in compare mode. N 2 GND Negative Supply Voltage. 3 V Noninverting Analog Input. P 4 V Inverting Analog Input. N 5 LE/HYS Latch/Hysteresis Control. Bias with resistor or current for hysteresis adjustment; drive low to latch. 6 V /V Input Section Supply/Output Section Supply. Shared pin. CCI CCO
Table 7. ADCMP602 (MSOP-8) Pin Function Descriptions Pin No. Mnemonic Description
1 V Input Section Supply. CCI 2 V Noninverting Analog Input. P 3 V Inverting Analog Input. N 4 S Shutdown. Drive this pin low to shut down the device. DN 5 LE/HYS Latch/Hysteresis Control. Bias with resistor or current for hysteresis adjustment; drive low to latch. 6 GND Negative Supply Voltage. 7 Q Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, V , is greater P than the analog voltage at the inverting input, V , if the comparator is in compare mode. N 8 V Output Section Supply. CCO Rev. A | Page 7 of 16 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Characteristics Timing Information Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Application Information Power/Ground Layout and Bypassing TTL-/CMOS-Compatible Output Stage Using/Disabling the Latch Feature Optimizing Performance Comparator Propagation Delay Dispersion Comparator Hysteresis Crossover Bias Point Minimum Input Slew Rate Requirement Typical Application Circuits Outline Dimensions Ordering Guide
