Datasheet HMC874LC3C (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 20 Gbps Clocked Comparator |
| Pages / Page | 12 / 1 — HMC874LC3C. 20 Gbps CLOCKED COMPARATOR. Typical Applications. Features. … |
| File Format / Size | PDF / 677 Kb |
| Document Language | English |
HMC874LC3C. 20 Gbps CLOCKED COMPARATOR. Typical Applications. Features. Functional Diagram. General Description
Model Line for this Datasheet
Text Version of Document
HMC874LC3C
v07.0616
20 Gbps CLOCKED COMPARATOR Typical Applications Features
The HMC874LC3C is ideal for: Propagation Delay Clock to Output: 120 ps T • ATE Applications Overdrive & Slew Rate Dispersion: 10 ps M • High Speed Instrumentation Minimum Pulse Width: 60 ps • Digital Receiver Systems Resistor Programmable Hysteresis S - S • Pulse Spectroscopy Differential Clock Control R • High Speed Trigger Circuits Input Bandwidth: 10 GHz O • Clock & Data Restoration Power Dissipation: 150 mW RSCML Version Available AT R 16 Lead 3x3 mm SMT Package: 9 mm2 A P
Functional Diagram General Description
The HMC874LC3C is a SiGe monolithic, ultra OM fast comparator. The comparator supports C 20 Gbps operation while providing 120 ps clock to data output delay and 60 ps minimum pulse width with 0.2 ps rms random jitter (RJ). 25 Gbps operation can be achieved with reduced output vol- tage swing. Overdrive and slew rate dispersion are typical y 10 ps, making the device ideal for a wide range of applications from ATE to broadband com- munications. The output stages are designed to directly drive 400 mV into 50 ohms terminated to Vtt = (Vcco - 2.0 V). The HMC874LC3C features high-speed latches with programmable hysteresis, and is configured to operate as a clocked comparator.
Electrical Specifications TA = +25 ºC, Vcci= +3.3 V, Vcco = +2.0 V, CLK / CLK = 1.6 V to 2.4 V, Vee = -3 V, V = 0 V tt
Parameter Conditions Min. Typ. Max Units Input Voltage Range Maximum DC Input Current = 20 mA -2 2 V Input Differential Voltage -1.75 1.75 V Input Offset Voltage (V ) ±5 mV OS Input Offset Voltage, Temperature Coefficient 15 µV / °C Input Bias Current 15 uA Input Bias Current Temperature Coefficient 50 nA / °C Input Offset Current 4 µA Input Impedance 50 Ω Common Mode Input Impedance 350 KΩ Differential Input Impedance 15 KΩ Hysteresis Rhys = ∞ ±1 mV Information furnished by Analog Devices is believed to be accurate and reliable. However, no For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
1
rights of third parties that may result from its use. Specifications subject to change without notice. No Phone: 781-329-4700 • Order online at www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Application Support: Phone: 1-800-ANALOG-D Document Outline Typical Applications Features Functional Diagram General Description Electrical Specifications Performance Characteristics Outline Drawing Package Information Evaluation PCB CLK, CLK Interfacing Resistor Network Bias Tee
v07.0616
20 Gbps CLOCKED COMPARATOR Typical Applications Features
The HMC874LC3C is ideal for: Propagation Delay Clock to Output: 120 ps T • ATE Applications Overdrive & Slew Rate Dispersion: 10 ps M • High Speed Instrumentation Minimum Pulse Width: 60 ps • Digital Receiver Systems Resistor Programmable Hysteresis S - S • Pulse Spectroscopy Differential Clock Control R • High Speed Trigger Circuits Input Bandwidth: 10 GHz O • Clock & Data Restoration Power Dissipation: 150 mW RSCML Version Available AT R 16 Lead 3x3 mm SMT Package: 9 mm2 A P
Functional Diagram General Description
The HMC874LC3C is a SiGe monolithic, ultra OM fast comparator. The comparator supports C 20 Gbps operation while providing 120 ps clock to data output delay and 60 ps minimum pulse width with 0.2 ps rms random jitter (RJ). 25 Gbps operation can be achieved with reduced output vol- tage swing. Overdrive and slew rate dispersion are typical y 10 ps, making the device ideal for a wide range of applications from ATE to broadband com- munications. The output stages are designed to directly drive 400 mV into 50 ohms terminated to Vtt = (Vcco - 2.0 V). The HMC874LC3C features high-speed latches with programmable hysteresis, and is configured to operate as a clocked comparator.
Electrical Specifications TA = +25 ºC, Vcci= +3.3 V, Vcco = +2.0 V, CLK / CLK = 1.6 V to 2.4 V, Vee = -3 V, V = 0 V tt
Parameter Conditions Min. Typ. Max Units Input Voltage Range Maximum DC Input Current = 20 mA -2 2 V Input Differential Voltage -1.75 1.75 V Input Offset Voltage (V ) ±5 mV OS Input Offset Voltage, Temperature Coefficient 15 µV / °C Input Bias Current 15 uA Input Bias Current Temperature Coefficient 50 nA / °C Input Offset Current 4 µA Input Impedance 50 Ω Common Mode Input Impedance 350 KΩ Differential Input Impedance 15 KΩ Hysteresis Rhys = ∞ ±1 mV Information furnished by Analog Devices is believed to be accurate and reliable. However, no For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
1
rights of third parties that may result from its use. Specifications subject to change without notice. No Phone: 781-329-4700 • Order online at www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Application Support: Phone: 1-800-ANALOG-D Document Outline Typical Applications Features Functional Diagram General Description Electrical Specifications Performance Characteristics Outline Drawing Package Information Evaluation PCB CLK, CLK Interfacing Resistor Network Bias Tee
