Datasheet AD524 (Analog Devices) - 21

ManufacturerAnalog Devices
DescriptionPrecision Instrumentation Amplifier
Pages / Page25 / 21 — Data Sheet. AD524. +VS. +INPUT. 2 +. +10V. RG1. 10kΩ. G = 10. 350Ω. G = …
RevisionG
File Format / SizePDF / 590 Kb
Document LanguageEnglish

Data Sheet. AD524. +VS. +INPUT. 2 +. +10V. RG1. 10kΩ. G = 10. 350Ω. G = 100. 14-BIT. G = 1000. AD524C. ADC. 0V TO 2V. RG2. F.S. –INPUT. 1 –. 39kΩ. REF. –VS. AD589

Data Sheet AD524 +VS +INPUT 2 + +10V RG1 10kΩ G = 10 350Ω G = 100 14-BIT G = 1000 AD524C ADC 0V TO 2V RG2 F.S –INPUT 1 – 39kΩ REF –VS AD589

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Data Sheet AD524 +VS +VS +INPUT 2 + +10V 8 8 RG1 16 10kΩ G = 10 2 + 13 4 10 350Ω 350Ω RG 16 G = 100 1 12 AD524 9 5 13 14-BIT 10 G = 1000 6 11 G = 100 12 AD524C ADC 9 350Ω 350Ω 0V TO 2V RG2 3 6 11 F.S. 7 –INPUT 1 – RG 3 2 1 7 39kΩ V –V REF S –VS –V AD589 R3 S +VS 20kΩ R5
052
20kΩ
0- 050 0
15 14 16 C1 MSB +VS
Figure 52. Typical Bridge Application
4 1/2 DATA OUT1 R4 INPUTS LSB 1 2 – 8 10kΩ AD712 11 AD7524 1 6 – ERROR BUDGET ANALYSIS OUT2 CS 12 2 3 + 7 1/2 5 + 4
To illustrate how instrumentation amplifier specifications are
WR 13 R6 AD712 3 5kΩ
applied, review a typical case where an AD524 is required to
–V
0
S
05 0- amplify the output of an unbalanced transducer. Figure 52
GND
050 0 shows a differential transducer, unbalanced by 100 Ω, supplying Figure 50. Software Controllable Offset a 0 mV to 20 mV signal to an AD524C. The output of the IA In many applications, complex software algorithms for auto- feeds a 14-bit ADC with a 0 V to 2 V input voltage range. The zero applications are not available. For those applications, operating temperature range is −25°C to +85°C. Therefore, the Figure 51 provides a hardware solution. largest change in temperature, ΔT, within the operating range is
+VS
from ambient to +85°C (85°C − 25°C = 60°C).
+ 2 15 16 RG 8
In many applications, differential linearity and resolution are of
1 16 10
prime importance in cases where the absolute value of a variable is
14 13 VOUT 12 AD524 9
less important than changes in value. In these applications, only
13 9 10 11 6 0.1µF LOW RG CH 2
the irreducible errors (45 ppm = 0.004%) are significant. Further-
3 LEAKAGE 7 1
more, if a system has an intelligent processor monitoring the
1kΩ –V
analog-to-digital output, the addition of an autogain/auto-zero
S 12 11 AD711 +
cycle removes all reducible errors and may eliminate the require- ment for initial calibration. This also reduces errors to 0.004%.
V DD 8 VSS 1 AD7510KD GND 2 A1 A2 A3 A4 200µs
051
ZERO PULSE
00- 005 Figure 51. Auto-Zero Circuit Rev. G | Page 21 of 25 Document Outline FEATURES FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS CONNECTION DIAGRAMS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION INPUT PROTECTION INPUT OFFSET AND OUTPUT OFFSET GAIN INPUT BIAS CURRENTS COMMON-MODE REJECTION GROUNDING SENSE TERMINAL REFERENCE TERMINAL PROGRAMMABLE GAIN AUTO-ZERO CIRCUITS ERROR BUDGET ANALYSIS REFERENCES OUTLINE DIMENSIONS ORDERING GUIDE