Datasheet VCNL3030X01 (Vishay) - 7
| Manufacturer | Vishay |
| Description | Fully Integrated Proximity Sensor With Infrared Emitter, I2C Interface, and Interrupt Function |
| Pages / Page | 16 / 7 — VCNL3030X01. APPLICATION INFORMATION Pin Connection with the Host. Note. … |
| File Format / Size | PDF / 271 Kb |
| Document Language | English |
VCNL3030X01. APPLICATION INFORMATION Pin Connection with the Host. Note. Host. micro controller
Model Line for this Datasheet
Text Version of Document
VCNL3030X01
www.vishay.com Vishay Semiconductors
APPLICATION INFORMATION Pin Connection with the Host
VCNL3030X01 integrates proximity sensor and IRED all together with I2C interface. It is very easy for the baseband (CPU) to access PS data via I2C interface without extra software algorithms. The hardware schematic is shown in the following diagram. Two additional capacitors in the circuit can be used for the following purposes: (1) the 0.1 μF capacitor near the VDD pin is used for power supply noise rejection, (2) the 2.2 μF capacitor - connected to the anode - is used to prevent the IRED voltage from instantly dropping when the IRED is turned on, and (3) 2.2 kΩ is suitable for the pull up resistor of I2C except for the 8.2 kΩ applied on the INT pin.
Note
• IR cathode and LDR: pins need to be connected together externally 1.8 V to 5.5 V R2 R3 R4 2.5 V to 5.5 V IR anode (4) IR cathode (5) C1 C2 10 μF 100 nF
Host
LDR (6)
micro controller VCNL3030X01
2.5 V to 3.6 V V (1) DD INT (7) C3 GPIO 100 nF SCL (2) I2C bus clock SCL GND (3) SDA (8) I2C bus data SDA Fig. 11 - Circuitry with Two Separate Power Supply Sources Rev. 1.0, 12-Aug-2020
7
Document Number: 84960 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
www.vishay.com Vishay Semiconductors
APPLICATION INFORMATION Pin Connection with the Host
VCNL3030X01 integrates proximity sensor and IRED all together with I2C interface. It is very easy for the baseband (CPU) to access PS data via I2C interface without extra software algorithms. The hardware schematic is shown in the following diagram. Two additional capacitors in the circuit can be used for the following purposes: (1) the 0.1 μF capacitor near the VDD pin is used for power supply noise rejection, (2) the 2.2 μF capacitor - connected to the anode - is used to prevent the IRED voltage from instantly dropping when the IRED is turned on, and (3) 2.2 kΩ is suitable for the pull up resistor of I2C except for the 8.2 kΩ applied on the INT pin.
Note
• IR cathode and LDR: pins need to be connected together externally 1.8 V to 5.5 V R2 R3 R4 2.5 V to 5.5 V IR anode (4) IR cathode (5) C1 C2 10 μF 100 nF
Host
LDR (6)
micro controller VCNL3030X01
2.5 V to 3.6 V V (1) DD INT (7) C3 GPIO 100 nF SCL (2) I2C bus clock SCL GND (3) SDA (8) I2C bus data SDA Fig. 11 - Circuitry with Two Separate Power Supply Sources Rev. 1.0, 12-Aug-2020
7
Document Number: 84960 For technical questions, contact: sensorstechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
