Datasheet ADL9006CHIPS (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | 2 GHz to 28 GHz, GaAs, pHEMT, MMIC, Low Noise Amplifier |
| Pages / Page | 16 / 5 — Data Sheet. ADL9006CHIPS. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. … |
| File Format / Size | PDF / 547 Kb |
| Document Language | English |
Data Sheet. ADL9006CHIPS. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table 5. Parameter. Rating. Table 6. Thermal Resistance
Model Line for this Datasheet
Text Version of Document
Data Sheet ADL9006CHIPS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 5. Parameter Rating
Thermal performance is directly linked to system design and Drain Bias Voltage 8 V operating environment. Careful attention to printed circuit Gate Control (V board (PCB) thermal design is required. GG2) −2.6 V to +3.6 V RFIN 20 dBm θJC is the channel to case, thermal resistance, channel to bottom Continuous Power Dissipation (PDISS) at 1.72 W of the die using die attach epoxy. TDIE BOTTOM = 85°C (Derate 22.1 mW/°C above 85°C)
Table 6. Thermal Resistance
Temperature
Package θ 1 JC Unit
Storage Range −65°C to +150°C C-10-8 45.2 °C/W Operating Range (Die Bottom) −55°C to +85°C 1 θJC was determined by simulation under the following conditions: the heat Channel to Maintain 1,000,000 Hour 175 transfer is due solely to the thermal conduction from the channel, to the die Meant Time to Failure (MTTF) bottom, and the die bottom is held constant at the operating temperature Nominal Channel (T of 85°C. A = 85°C, VDD = 5 V) 97.43 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a
ELECTRONIC DISCHARGE (ESD) RATINGS
stress rating only; functional operation of the product at these The following ESD information is provided for handling of or any other conditions above those indicated in the operational ESD-sensitive devices in an ESD protected area only. section of this specification is not implied. Operation beyond Human body model (HBM) per ANSI/ESD A/JEDEC JS-001. the maximum operating conditions for extended periods may affect product reliability.
ESD Ratings for ADL9006CHIPS Table 7. ADL9006CHIPS, 10-Pad Bare Die (CHIP) ESD Model Withstand Threshold (V) Class
HBM 500 1B
ESD CAUTION
Rev. 0 | Page 5 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 2 GHz TO 14 GHz 14 GHz TO 22 GHz 22 GHz TO 28 GHz DC SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ELECTRONIC DISCHARGE (ESD) RATINGS ESD Ratings for ADL9006CHIPS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS SMALL SIGNAL RESPONSE LARGE SIGNAL RESPONSE THEORY OF OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICs Handling Precautions ASSEMBLY DIAGRAM OUTLINE DIMENSIONS ORDERING GUIDE
Thermal performance is directly linked to system design and Drain Bias Voltage 8 V operating environment. Careful attention to printed circuit Gate Control (V board (PCB) thermal design is required. GG2) −2.6 V to +3.6 V RFIN 20 dBm θJC is the channel to case, thermal resistance, channel to bottom Continuous Power Dissipation (PDISS) at 1.72 W of the die using die attach epoxy. TDIE BOTTOM = 85°C (Derate 22.1 mW/°C above 85°C)
Table 6. Thermal Resistance
Temperature
Package θ 1 JC Unit
Storage Range −65°C to +150°C C-10-8 45.2 °C/W Operating Range (Die Bottom) −55°C to +85°C 1 θJC was determined by simulation under the following conditions: the heat Channel to Maintain 1,000,000 Hour 175 transfer is due solely to the thermal conduction from the channel, to the die Meant Time to Failure (MTTF) bottom, and the die bottom is held constant at the operating temperature Nominal Channel (T of 85°C. A = 85°C, VDD = 5 V) 97.43 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a
ELECTRONIC DISCHARGE (ESD) RATINGS
stress rating only; functional operation of the product at these The following ESD information is provided for handling of or any other conditions above those indicated in the operational ESD-sensitive devices in an ESD protected area only. section of this specification is not implied. Operation beyond Human body model (HBM) per ANSI/ESD A/JEDEC JS-001. the maximum operating conditions for extended periods may affect product reliability.
ESD Ratings for ADL9006CHIPS Table 7. ADL9006CHIPS, 10-Pad Bare Die (CHIP) ESD Model Withstand Threshold (V) Class
HBM 500 1B
ESD CAUTION
Rev. 0 | Page 5 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 2 GHz TO 14 GHz 14 GHz TO 22 GHz 22 GHz TO 28 GHz DC SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ELECTRONIC DISCHARGE (ESD) RATINGS ESD Ratings for ADL9006CHIPS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS SMALL SIGNAL RESPONSE LARGE SIGNAL RESPONSE THEORY OF OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICs Handling Precautions ASSEMBLY DIAGRAM OUTLINE DIMENSIONS ORDERING GUIDE
