Datasheet AD8479 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | Very High Common-Mode Voltage Precision Difference Amplifier |
| Pages / Page | 17 / 5 — Data Sheet. AD8479. ABSOLUTE MAXIMUM RATINGS. 165. Table 2. 150. … |
| Revision | C |
| File Format / Size | PDF / 396 Kb |
| Document Language | English |
Data Sheet. AD8479. ABSOLUTE MAXIMUM RATINGS. 165. Table 2. 150. Parameter. Rating. 135. °C). A = 85°C. 120. URE. 105. RAT E. M E. N T. A = 25°C. JUNCT. 100
Model Line for this Datasheet
Text Version of Document
link to page 5
Data Sheet AD8479 ABSOLUTE MAXIMUM RATINGS 165 Table 2. 150 Parameter Rating 135
Supply Voltage, VS ±18 V
°C) T ( A = 85°C
Input Voltage Range, Common-Mode
120
and Differential
URE 105
Continuous 600 V (magnitude)
RAT E 90 P
10 sec 900 V (magnitude)
M E 75 T
Output Short-Circuit Duration Indefinite
N T A = 25°C 60 IO
REF(−) and REF(+) −VS − 0.3 V to +VS + 0.3 V
45
Maximum Junction Temperature 150°C
JUNCT 30
Operating Temperature Range −40°C to +125°C
15
Storage Temperature Range −65°C to +150°C
0
Lead Temperature (Soldering, 60 sec) 300°C
0 100 200 300 400 500 600 700
203
INPUT COMMON-MODE VOLTAGE (V rms)
Stresses at or above those listed under Absolute Maximum 11118- Figure 3. Junction Temperature (T Ratings may cause permanent damage to the product. This is a J) vs. Input Common-Mode Voltage Derived from Table 3 stress rating only; functional operation of the product at these
1.4
or any other conditions above those indicated in the operational section of this specification is not implied.
) 1.2 (W
Operation beyond the maximum operating conditions for
N IO
extended periods may affect product reliability.
1.0 AT IP THERMAL RESISTANCE SS 0.8 DI R
Thermal performance is directly linked to printed circuit board
E W 0.6
(PCB) design and operating environment. Careful attention to
O P
PCB thermal design is required.
M U 0.4 M XI
θ
A
JA is the natural convection junction-to-ambient thermal
M
resistance measured in a one cubic foot sealed enclosure. θ
0.2
JA is specified for the worst-case conditions, that is, a device
0
soldered in a circuit board for surface-mount packages. Ψ
–40 –20 0 20 40 60 80 100 120
204 JT is
AMBIENT TEMPERATURE (°C)
the junction-to-top-of-package characterization parameter. 11118- Figure 4. Maximum Power Dissipation vs. Ambient Temperature
Table 3. Thermal Resistance ESD CAUTION Package Type1 θJA ΨJT Unit
R-8 151.4 2.5 °C/W 1 Thermal impedance simulated values are based on a JEDEC 2S2P thermal test board for θJA and ΨJT. See JEDEC JESD-51. Rev. C | Page 5 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION BASIC CONNECTIONS SINGLE-SUPPLY OPERATION SYSTEM-LEVEL DECOUPLING AND GROUNDING USING A LARGE SHUNT RESISTOR OUTPUT FILTERING GAIN OF 60 DIFFERENTIAL AMPLIFIER ERROR BUDGET ANALYSIS EXAMPLE OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet AD8479 ABSOLUTE MAXIMUM RATINGS 165 Table 2. 150 Parameter Rating 135
Supply Voltage, VS ±18 V
°C) T ( A = 85°C
Input Voltage Range, Common-Mode
120
and Differential
URE 105
Continuous 600 V (magnitude)
RAT E 90 P
10 sec 900 V (magnitude)
M E 75 T
Output Short-Circuit Duration Indefinite
N T A = 25°C 60 IO
REF(−) and REF(+) −VS − 0.3 V to +VS + 0.3 V
45
Maximum Junction Temperature 150°C
JUNCT 30
Operating Temperature Range −40°C to +125°C
15
Storage Temperature Range −65°C to +150°C
0
Lead Temperature (Soldering, 60 sec) 300°C
0 100 200 300 400 500 600 700
203
INPUT COMMON-MODE VOLTAGE (V rms)
Stresses at or above those listed under Absolute Maximum 11118- Figure 3. Junction Temperature (T Ratings may cause permanent damage to the product. This is a J) vs. Input Common-Mode Voltage Derived from Table 3 stress rating only; functional operation of the product at these
1.4
or any other conditions above those indicated in the operational section of this specification is not implied.
) 1.2 (W
Operation beyond the maximum operating conditions for
N IO
extended periods may affect product reliability.
1.0 AT IP THERMAL RESISTANCE SS 0.8 DI R
Thermal performance is directly linked to printed circuit board
E W 0.6
(PCB) design and operating environment. Careful attention to
O P
PCB thermal design is required.
M U 0.4 M XI
θ
A
JA is the natural convection junction-to-ambient thermal
M
resistance measured in a one cubic foot sealed enclosure. θ
0.2
JA is specified for the worst-case conditions, that is, a device
0
soldered in a circuit board for surface-mount packages. Ψ
–40 –20 0 20 40 60 80 100 120
204 JT is
AMBIENT TEMPERATURE (°C)
the junction-to-top-of-package characterization parameter. 11118- Figure 4. Maximum Power Dissipation vs. Ambient Temperature
Table 3. Thermal Resistance ESD CAUTION Package Type1 θJA ΨJT Unit
R-8 151.4 2.5 °C/W 1 Thermal impedance simulated values are based on a JEDEC 2S2P thermal test board for θJA and ΨJT. See JEDEC JESD-51. Rev. C | Page 5 of 17 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION BASIC CONNECTIONS SINGLE-SUPPLY OPERATION SYSTEM-LEVEL DECOUPLING AND GROUNDING USING A LARGE SHUNT RESISTOR OUTPUT FILTERING GAIN OF 60 DIFFERENTIAL AMPLIFIER ERROR BUDGET ANALYSIS EXAMPLE OUTLINE DIMENSIONS ORDERING GUIDE
