Datasheet AEM00300 (E-peas) - 8
| Manufacturer | E-peas |
| Description | Highly Versatile Buck-Boost Ambient Energy Manager Battery Charger with Source Voltage Level Configuration |
| Pages / Page | 26 / 8 — DATASHEET. AEM00300. 2. Absolute Maximum Ratings. 3. Thermal Resistance |
| File Format / Size | PDF / 768 Kb |
| Document Language | English |
DATASHEET. AEM00300. 2. Absolute Maximum Ratings. 3. Thermal Resistance
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DATASHEET AEM00300 2. Absolute Maximum Ratings
Parameter Value Voltage on STO, SRC, BUFSRC, LIN, LOUT, BAL, CS_IN -0.3 V to 5.5 V Voltage on VINT, SRC_LVL_CFG[5:0], STO_CFG[3:0], STO_OVCH, STO_OVDIS, -0.3 V to 2.75 V STO_RDY, EN_HP, EN_STO_CH Operating junction temperature -40 °C to 125 °C Storage temperature -65 °C to 150 °C ESD HBM voltage > 2000 V ESD CDM voltage > 500 V Table 3: Absolute Maximum Ratings
3. Thermal Resistance
Package θJA θJC Unit QFN 28- pin TBD TBD °C/W Table 4: Thermal Resistance ESD CAUTION ESD (ELECTROSTATIC DISCHARGE) SENSITIVE DEVICE These devices have limited built-in ESD protection and damage may thus occur on devices subjected to high-energy ESD. Therefore, proper EESD precautions should be taken to avoid performance degradation or loss of functionality Table 5: ESD Caution DS_AEM00300_Rev1.0 Copyright © 2022 e-peas SA 9 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset and Wake Up States 7.3. Supply State 7.4. Source Voltage Regulation 7.5. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Custom Mode Configuration 8.4. Disable Storage Element Charging 8.5. Source Level Configuration 8.6. External Components 8.6.1. Storage element information 8.6.2. External inductor information 8.6.3. External capacitors information CSRC CINT 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 28-pin 4x4mm) 12.2. Board Layout 13. Revision History
Parameter Value Voltage on STO, SRC, BUFSRC, LIN, LOUT, BAL, CS_IN -0.3 V to 5.5 V Voltage on VINT, SRC_LVL_CFG[5:0], STO_CFG[3:0], STO_OVCH, STO_OVDIS, -0.3 V to 2.75 V STO_RDY, EN_HP, EN_STO_CH Operating junction temperature -40 °C to 125 °C Storage temperature -65 °C to 150 °C ESD HBM voltage > 2000 V ESD CDM voltage > 500 V Table 3: Absolute Maximum Ratings
3. Thermal Resistance
Package θJA θJC Unit QFN 28- pin TBD TBD °C/W Table 4: Thermal Resistance ESD CAUTION ESD (ELECTROSTATIC DISCHARGE) SENSITIVE DEVICE These devices have limited built-in ESD protection and damage may thus occur on devices subjected to high-energy ESD. Therefore, proper EESD precautions should be taken to avoid performance degradation or loss of functionality Table 5: ESD Caution DS_AEM00300_Rev1.0 Copyright © 2022 e-peas SA 9 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset and Wake Up States 7.3. Supply State 7.4. Source Voltage Regulation 7.5. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Custom Mode Configuration 8.4. Disable Storage Element Charging 8.5. Source Level Configuration 8.6. External Components 8.6.1. Storage element information 8.6.2. External inductor information 8.6.3. External capacitors information CSRC CINT 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 28-pin 4x4mm) 12.2. Board Layout 13. Revision History
