Datasheet ADG1433, ADG1434 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 4 Ω RON, Triple/Quad SPDT ±15 V/+12 V/±5 V iCMOS Switches |
| Pages / Page | 20 / 8 — ADG1433/ADG1434. Data Sheet. PIN CONFIGURATIONS AND FUNCTION … |
| Revision | E |
| File Format / Size | PDF / 394 Kb |
| Document Language | English |
ADG1433/ADG1434. Data Sheet. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. N1I. GND. D1 1. 12 EN. S1A. IN1. S1B. ADG1433. TOP VIEW. S2B 3. 10 S3B
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Text Version of Document
ADG1433/ADG1434 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS 1A DD ND S V G N1I 16 15 14 13 V 1 16 DD GND D1 1 12 EN S1A 2 15 IN1 S1B V 2 11 SS ADG1433 TOP VIEW D1 3 14 EN ADG1433 S2B 3 10 S3B (Not to Scale) S1B 4 TOP VIEW 13 V 4 9 SS D2 D3 (Not to Scale) S2B 5 12 S3B 5 6 7 8 D2 6 11 D3 2A N2I N3I 3A S2A S S 7 10 S3A NOTES IN2 8
005
9 IN3
003
1. THE EXPOSED PAD IS TIED TO THE SUBSTRATE, VSS.
06181- 06181- Figure 4. ADG1433 TSSOP Pin Configuration Figure 5. ADG1433 LFCSP Pin Configuration
Table 6. ADG1433 P in Function Descriptions Pin No. TSSOP LFCSP Mnemonic Description
1 15 VDD Most Positive Power Supply Potential. 2 16 S1A Source Terminal 1A. Can be an input or an output. 3 1 D1 Drain Terminal 1. Can be an input or an output. 4 2 S1B Source Terminal 1B. Can be an input or an output. 5 3 S2B Source Terminal 2B. Can be an input or an output. 6 4 D2 Drain Terminal 2. Can be an input or an output. 7 5 S2A Source Terminal 2A. Can be an input or an output. 8 6 IN2 Logic Control Input 2. 9 7 IN3 Logic Control Input 3. 10 8 S3A Source Terminal 3A. Can be an input or an output. 11 9 D3 Drain Terminal 3. Can be an input or an output. 12 10 S3B Source Terminal 3B. Can be an input or an output. 13 11 VSS Most Negative Power Supply Potential. In single-supply applications, it can be connected to ground. 14 12 EN Active Low Digital Input. When high, the device is disabled and all switches are off. When low, INx logic inputs determine the on switches. 15 13 IN1 Logic Control Input 1. 16 14 GND Ground (0 V) Reference. N/A1 0 EPAD Exposed Pad. The exposed pad is tied to the substrate, VSS. 1 N/A means not applicable.
Table 7. ADG1433 T ruth Table EN INx SxA SxB
1 X Off Off 0 0 Off On 0 1 On Off Rev. E | Page 8 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY 12 V SINGLE SUPPLY ±5 V DUAL SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE
005
9 IN3
003
1. THE EXPOSED PAD IS TIED TO THE SUBSTRATE, VSS.
06181- 06181- Figure 4. ADG1433 TSSOP Pin Configuration Figure 5. ADG1433 LFCSP Pin Configuration
Table 6. ADG1433 P in Function Descriptions Pin No. TSSOP LFCSP Mnemonic Description
1 15 VDD Most Positive Power Supply Potential. 2 16 S1A Source Terminal 1A. Can be an input or an output. 3 1 D1 Drain Terminal 1. Can be an input or an output. 4 2 S1B Source Terminal 1B. Can be an input or an output. 5 3 S2B Source Terminal 2B. Can be an input or an output. 6 4 D2 Drain Terminal 2. Can be an input or an output. 7 5 S2A Source Terminal 2A. Can be an input or an output. 8 6 IN2 Logic Control Input 2. 9 7 IN3 Logic Control Input 3. 10 8 S3A Source Terminal 3A. Can be an input or an output. 11 9 D3 Drain Terminal 3. Can be an input or an output. 12 10 S3B Source Terminal 3B. Can be an input or an output. 13 11 VSS Most Negative Power Supply Potential. In single-supply applications, it can be connected to ground. 14 12 EN Active Low Digital Input. When high, the device is disabled and all switches are off. When low, INx logic inputs determine the on switches. 15 13 IN1 Logic Control Input 1. 16 14 GND Ground (0 V) Reference. N/A1 0 EPAD Exposed Pad. The exposed pad is tied to the substrate, VSS. 1 N/A means not applicable.
Table 7. ADG1433 T ruth Table EN INx SxA SxB
1 X Off Off 0 0 Off On 0 1 On Off Rev. E | Page 8 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY 12 V SINGLE SUPPLY ±5 V DUAL SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY OUTLINE DIMENSIONS ORDERING GUIDE
