Datasheet ADG1334 (Analog Devices) - 7

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ADG1334 TERMINOLOGY RON tBBM
Ohmic resistance between D and S. Off time measured between the 80% point of both switches when switching from one address state to another.
ΔRON
Difference between the RON of any two channels.
VINL
Maximum input voltage for Logic 0.
IS (Off)
Source leakage current when switch is off.
VINH
Minimum input voltage for Logic 1.
ID (Off)
Drain leakage current when switch is off.
IINL (IINH)
Input current of the digital input.
ID, IS (On)
Channel leakage current when switch is on.
IDD
Positive supply current.
VD (VS)
Analog voltage on Terminal D, Terminal S.
ISS
Negative supply current.
CS (OFF)
Channel input capacitance for off condition.
Off Isolation
A measure of unwanted signal coupling through an off channel.
CD (Off)
Channel output capacitance for off condition.
Charge Injection
A measure of the glitch impulse transferred from the digital
CD, CS (On)
input to the analog output during switching. On switch capacitance.
Bandwidth CIN
Frequency at which the output is attenuated by 3 dB. Digital input capacitance.
On Response tON
Frequency response of the on switch. The delay between applying the digital control input and the output switching on (see Figure 14).
tOFF
The delay between applying the digital control input and the output switching off (see Figure 14). Rev. 0 | Page 7 of 12 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE