Datasheet ADG619, ADG620 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | CMOS, ±5 V/+5 V, 4 Ω, Single SPDT Switches |
| Pages / Page | 16 / 5 — ADG619/ADG620. SINGLE SUPPLY. Table 3. B. Version1. Parameter +25°C. 40°C … |
| Revision | C |
| File Format / Size | PDF / 367 Kb |
| Document Language | English |
ADG619/ADG620. SINGLE SUPPLY. Table 3. B. Version1. Parameter +25°C. 40°C to +85°C. Unit. Test Conditions/Comments
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ADG619/ADG620 SINGLE SUPPLY
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V. All specifications −40°C to +85°C, unless otherwise noted.
Table 3. B Version1 Parameter +25°C
−
40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to VDD V VDD = 4.5 V, VSS = 0 V On Resistance (RON) 7 Ω typ VS = 0 V to 4.5 V, IDS = −10 mA; see Figure 15 10 12.5 Ω max RON Match Between Channels (ΔRON) 0.8 Ω typ VS = 0 V to 4.5 V, IDS = −10mA 1.1 1.3 Ω max On-Resistance Flatness (RFLAT (ON)) 0.5 0.5 Ω typ VS = 1.5 V to 3.3 V, IDS = −10 mA 1.2 Ω max LEAKAGE CURRENTS VDD = 5.5 V Source Off Leakage, IS (Off ) ±0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 16 ±0.25 ±1 nA max Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = 1 V/4.5 V; see Figure 17 ±0.25 ±1 nA max DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max Digital Input Capacitance, CIN 2 pF typ DYNAMIC CHARACTERISTICS2 ADG619 tON 120 ns typ RL = 300 Ω, CL = 35 pF 220 280 ns max VS = 3.3 V; see Figure 18 tOFF 50 ns typ RL = 300 Ω, CL = 35 pF 75 110 ns max VS = 3.3 V; see Figure 18 Break-Before-Make Time Delay, tBBM 70 ns typ RL = 300 Ω, CL = 35 pF 10 ns min VS1 = VS2 = 3.3 V; see Figure 19 ADG620 tON 50 ns typ RL = 300 Ω, CL = 35 pF 85 110 ns max VS = 3.3 V; see Figure 18 tOFF 210 ns typ RL = 300 Ω, CL = 35 pF 340 420 ns max VS = 3.3 V; see Figure 18 Make-Before-Break Time Delay, tMBB 170 ns typ RL = 300 Ω, CL = 35 pF 10 ns min VS = 3.3 V; see Figure 20 Charge Injection 6 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 21 Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 22 Channel-to-Channel Crosstalk −67 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23 Bandwidth −3 dB 190 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 24 CS (OFF) 25 pF typ f = 1 MHz CD, CS (ON) 95 pF typ f = 1 MHz POWER REQUIREMENTS VDD = 5.5 V IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V 1.0 μA max 1 Temperature range for B version is −40°C to +85°C. 2 Guaranteed by design, not subject to production test. Rev. C | Page 5 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
ADG619/ADG620 SINGLE SUPPLY
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V. All specifications −40°C to +85°C, unless otherwise noted.
Table 3. B Version1 Parameter +25°C
−
40°C to +85°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to VDD V VDD = 4.5 V, VSS = 0 V On Resistance (RON) 7 Ω typ VS = 0 V to 4.5 V, IDS = −10 mA; see Figure 15 10 12.5 Ω max RON Match Between Channels (ΔRON) 0.8 Ω typ VS = 0 V to 4.5 V, IDS = −10mA 1.1 1.3 Ω max On-Resistance Flatness (RFLAT (ON)) 0.5 0.5 Ω typ VS = 1.5 V to 3.3 V, IDS = −10 mA 1.2 Ω max LEAKAGE CURRENTS VDD = 5.5 V Source Off Leakage, IS (Off ) ±0.01 nA typ VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 16 ±0.25 ±1 nA max Channel On Leakage, ID, IS (On) ±0.01 nA typ VS = VD = 1 V/4.5 V; see Figure 17 ±0.25 ±1 nA max DIGITAL INPUTS Input High Voltage, VINH 2.4 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH 0.005 μA typ VIN = VINL or VINH ±0.1 μA max Digital Input Capacitance, CIN 2 pF typ DYNAMIC CHARACTERISTICS2 ADG619 tON 120 ns typ RL = 300 Ω, CL = 35 pF 220 280 ns max VS = 3.3 V; see Figure 18 tOFF 50 ns typ RL = 300 Ω, CL = 35 pF 75 110 ns max VS = 3.3 V; see Figure 18 Break-Before-Make Time Delay, tBBM 70 ns typ RL = 300 Ω, CL = 35 pF 10 ns min VS1 = VS2 = 3.3 V; see Figure 19 ADG620 tON 50 ns typ RL = 300 Ω, CL = 35 pF 85 110 ns max VS = 3.3 V; see Figure 18 tOFF 210 ns typ RL = 300 Ω, CL = 35 pF 340 420 ns max VS = 3.3 V; see Figure 18 Make-Before-Break Time Delay, tMBB 170 ns typ RL = 300 Ω, CL = 35 pF 10 ns min VS = 3.3 V; see Figure 20 Charge Injection 6 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF; see Figure 21 Off Isolation −67 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 22 Channel-to-Channel Crosstalk −67 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 23 Bandwidth −3 dB 190 MHz typ RL = 50 Ω, CL = 5 pF; see Figure 24 CS (OFF) 25 pF typ f = 1 MHz CD, CS (ON) 95 pF typ f = 1 MHz POWER REQUIREMENTS VDD = 5.5 V IDD 0.001 μA typ Digital inputs = 0 V or 5.5 V 1.0 μA max 1 Temperature range for B version is −40°C to +85°C. 2 Guaranteed by design, not subject to production test. Rev. C | Page 5 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
