Datasheet ADG774 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | CMOS 3 V/5 V, Wide Bandwidth Quad 2:1 Mux |
| Pages / Page | 12 / 3 — ADG774. SINGLE SUPPLY (VDD = 3 V. 10%, GND = 0 V. All specifications TMIN … |
| File Format / Size | PDF / 139 Kb |
| Document Language | English |
ADG774. SINGLE SUPPLY (VDD = 3 V. 10%, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.). B Version1. –40. C to
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ADG774 SINGLE SUPPLY (VDD = 3 V 10%, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.) B Version1 –40 C to –40 C to Parameter +25 C +85 C +125 C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance (RON) 4 Ω typ VD = 0 V to VDD, IS = –10 mA 8 9 Ω max On Resistance Match between Channels (RON) 0.15 Ω typ VD = 0 V to VDD, IS = –10 mA 0.5 0.5 Ω max On Resistance Flatness (RFLAT(ON)) 2 Ω typ VD = 0 V to VDD, IS = –10 mA 4 4 Ω max LEAKAGE CURRENTS Source OFF Leakage IS (OFF) ±0.01 nA typ VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V; ±0.5 ±1 ±1.5 nA max Test Circuit 2 Drain OFF Leakage ID (OFF) ±0.01 nA typ VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V; ±0.5 ±1 ±1.5 nA max Test Circuit 2 Channel ON Leakage ID, IS (ON) ±0.01 nA typ VD = VS = 3 V; VD = VS = 1 V; Test Circuit 3 ±0.5 ±1 ±1.5 nA max DIGITAL INPUTS Input High Voltage, VINH 2.0 V min Input Low Voltage, VINL 0.8 V max Input Current IINL or IINH 0.001 µA typ VIN = VINL or VINH ±0.5 µA max DYNAMIC CHARACTERISTICS2 tON 8 ns typ RL = 100 Ω, CL = 35 pF, 16 21 ns max VS = +1.5 V; Test Circuit 4 tOFF 5 ns typ RL = 100 Ω, CL = 35 pF, 10 11 ns max VS = +1.5 V; Test Circuit 4 Break-Before-Make Time Delay, tD 5 ns typ RL = 100 Ω, CL = 35 pF, 1 ns min VS1 = VS2 = 3 V; Test Circuit 5 Off Isolation –65 dB typ RL = 50 Ω, f = 10 MHz; Test Circuit 7 Channel-to-Channel Crosstalk –75 dB typ RL = 50 Ω, f = 10 MHz; Test Circuit 8 Bandwidth –3 dB 240 MHz typ RL = 50 Ω; Test Circuit 6 Distortion 2 % typ RL = 50 Ω Charge Injection 3 pC typ CL = 1 nF; Test Circuit 9 CS (OFF) 10 pF typ f = 1 kHz CD (OFF) 20 pF typ f = 1 kHz CD, CS (ON) 30 pF typ f = 1 MHz POWER REQUIREMENTS VDD = +3.3 V Digital Inputs = 0 V or VDD IDD 1 1 µA max 0.001 µA typ IIN 1 1 µA typ VIN = +3 V IO 100 mA max VS/VD = 0 V NOTES 1Temperature range: B Version, –40°C to +125°C. 2Guaranteed by design, not subject to production test. Specifications subject to change without notice.
Table I. Truth Table EN IN D1 D2 D3 D4 Function
1 X Hi-Z Hi-Z Hi-Z Hi-Z DISABLE 0 0 S1A S2A S3A S4A IN = 0 0 1 S1B S2B S3B S4B IN = 1 REV. C –3– Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION TERMINOLOGY Typical Performance Characteristics Test Circuits OUTLINE DIMENSIONS Revision History
ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance (RON) 4 Ω typ VD = 0 V to VDD, IS = –10 mA 8 9 Ω max On Resistance Match between Channels (RON) 0.15 Ω typ VD = 0 V to VDD, IS = –10 mA 0.5 0.5 Ω max On Resistance Flatness (RFLAT(ON)) 2 Ω typ VD = 0 V to VDD, IS = –10 mA 4 4 Ω max LEAKAGE CURRENTS Source OFF Leakage IS (OFF) ±0.01 nA typ VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V; ±0.5 ±1 ±1.5 nA max Test Circuit 2 Drain OFF Leakage ID (OFF) ±0.01 nA typ VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V; ±0.5 ±1 ±1.5 nA max Test Circuit 2 Channel ON Leakage ID, IS (ON) ±0.01 nA typ VD = VS = 3 V; VD = VS = 1 V; Test Circuit 3 ±0.5 ±1 ±1.5 nA max DIGITAL INPUTS Input High Voltage, VINH 2.0 V min Input Low Voltage, VINL 0.8 V max Input Current IINL or IINH 0.001 µA typ VIN = VINL or VINH ±0.5 µA max DYNAMIC CHARACTERISTICS2 tON 8 ns typ RL = 100 Ω, CL = 35 pF, 16 21 ns max VS = +1.5 V; Test Circuit 4 tOFF 5 ns typ RL = 100 Ω, CL = 35 pF, 10 11 ns max VS = +1.5 V; Test Circuit 4 Break-Before-Make Time Delay, tD 5 ns typ RL = 100 Ω, CL = 35 pF, 1 ns min VS1 = VS2 = 3 V; Test Circuit 5 Off Isolation –65 dB typ RL = 50 Ω, f = 10 MHz; Test Circuit 7 Channel-to-Channel Crosstalk –75 dB typ RL = 50 Ω, f = 10 MHz; Test Circuit 8 Bandwidth –3 dB 240 MHz typ RL = 50 Ω; Test Circuit 6 Distortion 2 % typ RL = 50 Ω Charge Injection 3 pC typ CL = 1 nF; Test Circuit 9 CS (OFF) 10 pF typ f = 1 kHz CD (OFF) 20 pF typ f = 1 kHz CD, CS (ON) 30 pF typ f = 1 MHz POWER REQUIREMENTS VDD = +3.3 V Digital Inputs = 0 V or VDD IDD 1 1 µA max 0.001 µA typ IIN 1 1 µA typ VIN = +3 V IO 100 mA max VS/VD = 0 V NOTES 1Temperature range: B Version, –40°C to +125°C. 2Guaranteed by design, not subject to production test. Specifications subject to change without notice.
Table I. Truth Table EN IN D1 D2 D3 D4 Function
1 X Hi-Z Hi-Z Hi-Z Hi-Z DISABLE 0 0 S1A S2A S3A S4A IN = 0 0 1 S1B S2B S3B S4B IN = 1 REV. C –3– Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION TERMINOLOGY Typical Performance Characteristics Test Circuits OUTLINE DIMENSIONS Revision History
