Datasheet SY58608U (Microchip) - 7
| Manufacturer | Microchip |
| Description | 2.5V, high-speed, fully differential 1:2 LVDS fanout buffer optimized to provide two identical output copies with less than 20ps of skew and less than 10psPP total jitter |
| Pages / Page | 24 / 7 — SY58608U. 3.0. TIMING DIAGRAMS. FIGURE 3-1:. FIGURE 3-2: |
| File Format / Size | PDF / 2.7 Mb |
| Document Language | English |
SY58608U. 3.0. TIMING DIAGRAMS. FIGURE 3-1:. FIGURE 3-2:
Model Line for this Datasheet
Text Version of Document
SY58608U 3.0 TIMING DIAGRAMS FIGURE 3-1:
Propagation Delay. DECAYING INPUT SIGNAL FSI ACTIVATED ONCE INPUT AMPLITUDE GOES SIGNIFICANTLY BELOW 100mV (TYPICALLY 30mV)
FIGURE 3-2:
Fail Safe Feature. 2018 Microchip Technology Inc. DS20005605A-page 7 Document Outline 1.0 Electrical Characteristics 2.0 Functional Description 2.1 Fail-Safe Input (FSI) 2.2 Input Clock Failure Case 3.0 Timing Diagrams 4.0 Typical Performance Curves 5.0 Additive Phase Noise Plot 6.0 Input Stage 7.0 Input Interface Applications 8.0 Pin Descriptions 9.0 Packaging Information 9.1 Package Marking Information Appendix A: Revision History Product Identification System Worldwide Sales and Service
Propagation Delay. DECAYING INPUT SIGNAL FSI ACTIVATED ONCE INPUT AMPLITUDE GOES SIGNIFICANTLY BELOW 100mV (TYPICALLY 30mV)
FIGURE 3-2:
Fail Safe Feature. 2018 Microchip Technology Inc. DS20005605A-page 7 Document Outline 1.0 Electrical Characteristics 2.0 Functional Description 2.1 Fail-Safe Input (FSI) 2.2 Input Clock Failure Case 3.0 Timing Diagrams 4.0 Typical Performance Curves 5.0 Additive Phase Noise Plot 6.0 Input Stage 7.0 Input Interface Applications 8.0 Pin Descriptions 9.0 Packaging Information 9.1 Package Marking Information Appendix A: Revision History Product Identification System Worldwide Sales and Service
