TS432 Taiwan Semiconductor TYPICAL PERFORMANCE CHARACTERISTICSTest Circuit for Curve A The areas under the curves represent conditions that may cause the device to oscillate. For curves B, C, and D, R2 and V+ were adjusted to establish the initial VKA and IKA conditions with CL=0. VBATT and CL then were adjusted to Test Circuit for Curve B, C and D determine the ranges of stability. Figure 17: Stability Boundary ConditionTest Circuit for Pulse Response, Ik=1mAFigure 18: Pulse Response 6 Version: G2408