Magnitude = SQRT(R^2+I^2)
Phase = arctg(I/R)
To determine the actual real impedance value Z(W) , generally a frequency sweep is performed. The impedance can be calculated at each point and a frequency vs magnitude plot can be created.
The system allows the user to program a 2V PK-PK sinusoidal signal as excitation to an external load. Output ranges of 1V, 500mV, 200mV can also be programmed. The signal is provided on chip using DDS techniques. Frequency resolution of 27 bits (less than 0.1 HZ) can be achieved. The clock for the DDS can be generated from an external reference clock, an internal RC oscillator or an internal PLL. The PLL has a gain stage of 512 and typically needs a reference clock of 32 kHz on the MCLK pin.
To perform the frequency sweep, the user must first program the conditions required for the sweep; start frequency, delta frequency, step frequency, etc. A Start Command is then required to begin the sweep.
At each point on the sweep the ADC will take 1024 samples and calculate a Discrete Fourier Transform to provide the real and imaginary data for the waveform. The real and imaginary data is available to the user through the 12C interface.
To determine the impedance of the load at any one frequency point, Z(w), a measurement system comprised of a trans impedance amplifier, gain stage and ADC are used to record data. The gain stage for the response stage is 1 or 5.
The ADC is a low noise, high speed 1 MSPS sampling ADC that operates from a 3 V supply. Clocking for both the DDS and ADC signals is provided externally via the MCLK reference clock, which is provided externally from a crystal oscillator. The AD5933 is available in a 16 ld SSOP.
