Datasheet LTC1603 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | High Speed, 16-Bit, 250ksps Sampling A/D Converter with Shutdown |
| Pages / Page | 20 / 7 — FU CTIO AL BLOCK DIAGRA. TEST CIRCUITS. Load Circuits for Access Timing. … |
| File Format / Size | PDF / 261 Kb |
| Document Language | English |
FU CTIO AL BLOCK DIAGRA. TEST CIRCUITS. Load Circuits for Access Timing. Load Circuits for Output Float Delay
Model Line for this Datasheet
Text Version of Document
LTC1603
U U W FU CTIO AL BLOCK DIAGRA
2.2µF 10µF 5V 10µF 5V 10µF 10Ω + + + 3 36 35 9 10 V AV REF DD AVDD DVDD DGND SHDN 33 CS 32 CONTROL µP LOGIC CONVST 31 REFCOMP CONTROL 4 7.5k AND 2.5V RD 30 1.75X LINES TIMING + 4.375V REF BUSY 27 47µF OVDD 29 5V OR + 3V 10µF + OGND 28 1 AIN + DIFFERENTIAL 16-BIT OUTPUT ANALOG INPUT B15 TO B0 – SAMPLING 16-BIT ± BUFFERS 2.5V 2 AIN ADC – D15 TO D0 PARALLEL BUS 11 TO 26 AGND AGND AGND AGND VSS 1603 TA01 5 6 7 8 34 10µF + –5V
TEST CIRCUITS Load Circuits for Access Timing Load Circuits for Output Float Delay
5V 5V 1k 1k DN DN DN DN 1k CL CL 1k CL CL (A) Hi-Z TO VOH AND VOL TO VOH (B) Hi-Z TO VOL AND VOH TO VOL (A) VOH TO Hi-Z (B) VOL TO Hi-Z 1603 TC01 1603 TC02 1603f 7
U U W FU CTIO AL BLOCK DIAGRA
2.2µF 10µF 5V 10µF 5V 10µF 10Ω + + + 3 36 35 9 10 V AV REF DD AVDD DVDD DGND SHDN 33 CS 32 CONTROL µP LOGIC CONVST 31 REFCOMP CONTROL 4 7.5k AND 2.5V RD 30 1.75X LINES TIMING + 4.375V REF BUSY 27 47µF OVDD 29 5V OR + 3V 10µF + OGND 28 1 AIN + DIFFERENTIAL 16-BIT OUTPUT ANALOG INPUT B15 TO B0 – SAMPLING 16-BIT ± BUFFERS 2.5V 2 AIN ADC – D15 TO D0 PARALLEL BUS 11 TO 26 AGND AGND AGND AGND VSS 1603 TA01 5 6 7 8 34 10µF + –5V
TEST CIRCUITS Load Circuits for Access Timing Load Circuits for Output Float Delay
5V 5V 1k 1k DN DN DN DN 1k CL CL 1k CL CL (A) Hi-Z TO VOH AND VOL TO VOH (B) Hi-Z TO VOL AND VOH TO VOL (A) VOH TO Hi-Z (B) VOL TO Hi-Z 1603 TC01 1603 TC02 1603f 7
