Datasheet HMCAD1511 (Analog Devices) - 5

HMCAD1511
v04.1015
HigH Speed Multi-Mode 8-Bit 30 MSpS to 1 gSpS A/d Converter AC Specifications
AvDD = 1.8v, DvDD = 1.8v, ovDD = 1.8v, 50% clock duty cycle, -1 dBFs 71 MHz input signal, Gain = 1X, rsDs output data levels unless otherwise noted
Parameter Description Min Typ Max Unit
Crosstalk Dual Ch Mode. signal applied to 1 channel (F ). In0 X Measurement taken on one channel with full scale at F . 65 dBc tlk,2 In1 F = 71 MHz, F = 70 MHz In1 In0 Crosstalk Quad Ch Mode. signal applied to 1 channel X (F ). Measurement taken on one channel with full scale at 70 dBc tlk,4 In0 F . F = 71 MHz, F = 70 MHz In1 In1 In0 single Ch: F = 1 GsPs, Dual Ch: F = 500 MsPs, Quad
Power Supply
s s Ch: F = 250 MsPs. s I Analog supply Current 270 mA AvDD I Digital and output driver supply Current 125 mA DvDD P Analog Power 486 mW AvDD P Digital Power 224 mW DvDD P total Power Dissipation 710 mW tot 0 P Power Down Mode dissipation 15 µW PD P Deep sleep Mode power dissipation 72 mW sLP Power dissipation with all channels in sleep channel mode P 153 mW sLPCH t (Light sleep) Power dissipation savings per channel off (Quad Channel M P 139 mW sLPCH_sAv mode) s
Analog Input
FPBW Full Power Bandwidth 650 MHz
Clock Inputs
s - Max. Conversion rate in Modes: single Ch 1000 / r F MsPs smax e Dual Ch / Quad Ch 500 / 250 t Min. Conversion rate in Modes: single Ch 120 / F MsPs r smin Dual Ch / Quad Ch 60 / 30 e v
digital and Switching Specifications
n AvDD = 1.8v, DvDD = 1.8v, ovDD = 1.8v, rsDs output data levels, unless otherwise noted o
Parameter Description Min Typ Max Unit Clock Inputs
DC Duty Cycle 45 55 % high Compliance LvDs supported up to 700 MHz LvPeCL, sine wave, CMos, LvDs v Differential input voltage swing, sine wave clock input 1500 mvpp CK,sine A / D C v voltage input range CMos (CLKn connected to ground) v CK,CMos ovDD Input common mode voltage. Keep voltages within ground and v 0.3 v -0.3 v CM,CK voltage of ovDD ovDD C Differential Input capacitance 3 pF CK
Logic inputs (CMOS)
v High Level Input voltage. v ≥ 3.0v 2 v HI ovDD v High Level Input voltage. v = 1.7v – 3.0v 0.8 ·v v HI ovDD ovDD v Low Level Input voltage. v ≥ 3.0v 0 0.8 v LI ovDD v Low Level Input voltage. v = 1.7v – 3.0v 0 0.2 ·v v LI ovDD ovDD I High Level Input leakage Current +/-10 µA HI I Low Level Input leakage Current +/-10 µA LI C Input Capacitance 3 pF I
Data Outputs
Compliance LvDs / rsDs Informatio For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, n furnished by Analog Devices is believed to be accurate and reliable. However, no For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringement MA 02062-9106 s of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise Phone: 781-329-4700 • Order online at www.analog.com under any patent or patent rights of Analog Devices. Phone: 781-329-4700 • Order online at www.analog.com
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