Datasheet AD9246 (Analog Devices) - 10

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AD9246 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ) B DD ND S L B DD ND DD K– K+ ND DRV DRG D1 D0 ( DCO OE AV AG AV CL CL AG 48 47 46 45 44 43 42 41 40 39 38 37 D2 1 36 PDWN PIN 1 D3 2 INDICATOR 35 RBIAS D4 3 34 CML D5 4 33 AVDD D6 5 32 AGND D7 6 AD9246 31 VIN– DRGND 7 TOP VIEW 30 VIN+ DRVDD 8 (Not to Scale) 29 AGND D8 9 28 REFT D9 10 27 REFB D10 11 26 VREF D11 12 25 SENSE 13 14 15 16 17 18 19 20 21 22 23 24 ) B D S B D12 S OR N DD F ND DD ND DD M G V /DCS /D CS K AG AV AG AV DR DR IO D L D13 ( S SC
03 0 1- 49 05 Figure 3. Pin Configuration
Table 7. Pin Function Description Pin No. Mnemonic Description
0, 21, 23, 29, 32, AGND Analog Ground. (Pin 0 is the exposed thermal pad on the bottom of the package.) 37, 41 45, 46, 1 to 6, D0 (LSB) to D13 (MSB) Data Output Bits. 9 to 14 7, 16, 47 DRGND Digital Output Ground. 8, 17, 48 DRVDD Digital Output Driver Supply (1.8 V to 3.3 V). 15 OR Out-of-Range Indicator. 18 SDIO/DCS Serial Port Interface (SPI)® Data Input/Output (Serial Port Mode); Duty Cycle Stabilizer Select (External Pin Mode). See Table 10. 19 SCLK/DFS Serial Port Interface Clock (Serial Port Mode); Data Format Select Pin (External Pin Mode). 20 CSB Serial Port Interface Chip Select (Active Low). See Table 10. 22, 24, 33, 40, 42 AVDD Analog Power Supply. 25 SENSE Reference Mode Selection. See Table 9. 26 VREF Voltage Reference Input/Output. 27 REFB Differential Reference (−). 28 REFT Differential Reference (+). 30 VIN+ Analog Input Pin (+). 31 VIN– Analog Input Pin (−). 34 CML Common-Mode Level Bias Output. 35 RBIAS External Bias Resistor Connection. A 10 kΩ resistor must be connected between this pin and analog ground (AGND). 36 PDWN Power-Down Function Select. 38 CLK+ Clock Input (+). 39 CLK– Clock Input (−). 43 OEB Output Enable (Active Low). 44 DCO Data Clock Output. Rev. A | Page 9 of 44 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUT CONSIDERATIONS VOLTAGE REFERENCE CLOCK INPUT CONSIDERATIONS JITTER CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS TIMING SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE CONFIGURATION WITHOUT THE SPI MEMORY MAP READING THE MEMORY MAP REGISTER TABLE MEMORY MAP REGISTER TABLE LAYOUT CONSIDERATIONS POWER AND GROUND RECOMMENDATIONS CML RBIAS REFERENCE DECOUPLING EVALUATION BOARD POWER SUPPLIES INPUT SIGNALS OUTPUT SIGNALS DEFAULT OPERATION AND JUMPER SELECTION SETTINGS ALTERNATIVE CLOCK CONFIGURATIONS ALTERNATIVE ANALOG INPUT DRIVE CONFIGURATION SCHEMATICS EVALUATION BOARD LAYOUTS BILL OF MATERIALS OUTLINE DIMENSIONS ORDERING GUIDE