Datasheet ADXL354, ADXL355 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | Low Noise, Low Drift, Low Power 3-Axis Accelerometer with digital output |
| Pages / Page | 42 / 1 — Low Noise, Low Drift, Low Power,. 3-Axis MEMS Accelerometers. Data Sheet. … |
| Revision | A |
| File Format / Size | PDF / 1.6 Mb |
| Document Language | English |
Low Noise, Low Drift, Low Power,. 3-Axis MEMS Accelerometers. Data Sheet. ADXL354. /ADXL355. FEATURES. FUNCTIONAL BLOCK DIAGRAMS
Model Line for this Datasheet
Text Version of Document
Low Noise, Low Drift, Low Power, 3-Axis MEMS Accelerometers Data Sheet ADXL354 /ADXL355 FEATURES FUNCTIONAL BLOCK DIAGRAMS Hermetic package offers excellent long-term stability V1P8ANA V1P8DIG RANGE 0 g offset vs. temperature (all axes): 0.15 mg /°C maximum LDO POWER Ultralow noise density (all axes): 20 μg /√Hz (ADXL354) VSUPPLY LDO MANAGEMENT Low power, VSUPPLY (LDO enabled) XOUT ADXL354 in me asurement mode: 150 μA Y ANALOG OUT ST1 FILTER ADXL355 in me asurement mode: 200 μA 3-AXIS OUT SENSOR ST2 CONTROL ADXL354/ ADXL355 in stan dby mode: 21 μA LOGIC STBY TEMP ADXL354 has user ad justable analog output bandwidth TEMP ADXL354 SENSOR VDDIO
2
ADXL355 digit al output features
00 5-
Digital serial peripheral interface (SPI)/I2C interfaces VSSIO VSS
1420
20-bit analog-to-digital converter (ADC)
Figure 1. ADXL354 Functional Block Diagram
Data interpolation routine for synchronous sampling V1P8ANA V V 1P8DIG DDIO Programmable high- and low-pass digital filters POWER Electromechanical self test LDO MANAGEMENT VSUPPLY LDO ADXL355 Integrated temperature sensor ADC INT1 Voltage range options CONTROL INT2 ANALOG ADC DIGITAL LOGIC V FILTER FILTER DRDY SUPPLY with internal regulators: 2.25 V to 3.6 V 3-AXIS ADC CS/SCL V SENSOR 1P8ANA, V1P8DIG with internal low dropout regulator (LDO) SCLK/VSSIO TEMP ADC FIFO SERIAL MOSI/SDA bypassed: 1.8 V typical ± 10% SENSOR I/O MISO/ASEL
1 -00
Operating temperature range: −40°C to +125°C V
205
SSIO VSS
14
14-terminal, 6 mm × 6 mm × 2.1 mm, LCC package,
Figure 2. ADXL355 Functional Block Diagram
0.26 grams APPLICATIONS Inertial measurement units (IMUs)/altitude and heading reference systems (AHRSs) Platform stabilization systems Structural health monitoring Seismic imaging Tilt sensing Robotics Condition monitoring GENERAL DESCRIPTION
The analog output ADXL354 and the digital output ADXL355 Highly integrated in a compact form factor, the low power are low noise density, low 0 g offset drift, low power, 3-axis ADXL355 is ideal in an Internet of Things (IoT) sensor node accelerometers with selectable measurement ranges. The and other wireless product designs. ADXL354B supports the ±2 g and ±4 g ranges, the ADXL354C The ADXL355 multifunction pin names may be referenced by supports the ±2 g and ±8 g ranges, and the ADXL355 supports their relevant function only for either the SPI or I2C interfaces. the ±2.048 g, ±4.096 g, and ±8.192 g ranges. The ADXL354/ ADXL355 offer industry leading noise, minimal offset drift over temperature, and long term stability enabling precision applications with minimal calibration. 1 Protected by U.S. Patents 8,472,270; 9,041,462; 8,665,627; 8,917,099; 6,892,576; 9,297,825; and 7,956,621.
Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ANALOG OUTPUT FOR THE ADXL354 DIGITAL OUTPUT FOR THE ADXL355 SPI DIGITAL INTERFACE CHARACTERISTICS FOR THE ADXL355 I2C DIGITAL INTERFACE CHARACTERISTICS FOR THE ADXL355 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS ROOT ALLAN VARIANCE (RAV) ADXL355 CHARACTERISTICS THEORY OF OPERATION ANALOG OUTPUT DIGITAL OUTPUT AXES OF ACCELERATION SENSITIVITY POWER SEQUENCING POWER SUPPLY DESCRIPTION VSUPPLY V1P8ANA V1P8DIG VDDIO OVERRANGE PROTECTION SELF TEST FILTER SERIAL COMMUNICATIONS SPI PROTOCOL I2C PROTOCOL READING ACCELERATION OR TEMPERATURE DATA FROM THE INTERFACE FIFO INTERRUPTS DATA_RDY DRDY PIN FIFO_FULL FIFO_OVR ACTIVITY NVM_BUSY EXTERNAL SYNCHRONIZATION AND INTERPOLATION EXT_SYNC = 00—No External Sync or Interpolation EXT_SYNC = 10—External Sync with Interpolation EXT_SYNC = 01—External Sync and External Clock ADXL355 REGISTER MAP REGISTER DEFINITIONS ANALOG DEVICES ID REGISTER Address: 0x00, Reset: 0xAD, Name: DEVID_AD ANALOG DEVICES MEMS ID REGISTER Address: 0x01, Reset: 0x1D, Name: DEVID_MST DEVICE ID REGISTER Address: 0x02, Reset: 0xED, Name: PARTID PRODUCT REVISION ID REGISTER Address: 0x03, Reset: 0x00, Name: REVID STATUS REGISTER Address: 0x04, Reset: 0x00, Name: STATUS FIFO ENTRIES REGISTER Address: 0x05, Reset: 0x00, Name: FIFO_ENTRIES TEMPERATURE DATA REGISTERS Address: 0x06, Reset: 0x00, Name: TEMP2 Address: 0x07, Reset: 0x00, Name: TEMP1 X-AXIS DATA REGISTERS Address: 0x08, Reset: 0x00, Name: XDATA3 Address: 0x09, Reset: 0x00, Name: XDATA2 Address: 0x0A, Reset: 0x00, Name: XDATA1 Y-AXIS DATA REGISTERS Address: 0x0B, Reset: 0x00, Name: YDATA3 Address: 0x0C, Reset: 0x00, Name: YDATA2 Address: 0x0D, Reset: 0x00, Name: YDATA1 Z-AXIS DATA REGISTERS Address: 0x0E, Reset: 0x00, Name: ZDATA3 Address: 0x0F, Reset: 0x00, Name: ZDATA2 Address: 0x10, Reset: 0x00, Name: ZDATA1 FIFO ACCESS REGISTER Address: 0x11, Reset: 0x00, Name: FIFO_DATA X-AXIS OFFSET TRIM REGISTERS Address: 0x1E, Reset: 0x00, Name: OFFSET_X_H Address: 0x1F, Reset: 0x00, Name: OFFSET_X_L Y-AXIS OFFSET TRIM REGISTERS Address: 0x20, Reset: 0x00, Name: OFFSET_Y_H Address: 0x21, Reset: 0x00, Name: OFFSET_Y_L Z-AXIS OFFSET TRIM REGISTERS Address: 0x22, Reset: 0x00, Name: OFFSET_Z_H Address: 0x23, Reset: 0x00, Name: OFFSET_Z_L ACTIVITY ENABLE REGISTER Address: 0x24, Reset: 0x00, Name: ACT_EN ACTIVITY THRESHOLD REGISTERS Address: 0x25, Reset: 0x00, Name: ACT_THRESH_H Address: 0x26, Reset: 0x00, Name: ACT_THRESH_L ACTIVITY COUNT REGISTER Address: 0x27, Reset: 0x01, Name: ACT_COUNT FILTER SETTINGS REGISTER Address: 0x28, Reset: 0x00, Name: Filter FIFO SAMPLES REGISTER Address: 0x29, Reset: 0x60, Name: FIFO_SAMPLES INTERRUPT PIN (INTx) FUNCTION MAP REGISTER Address: 0x2A, Reset: 0x00, Name: INT_MAP DATA SYNCHRONIZATION Address: 0x2B, Reset: 0x00, Name: Sync I2C SPEED, INTERRUPT POLARITY, AND RANGE REGISTER Address: 0x2C, Reset: 0x81, Name: Range POWER CONTROL REGISTER Address: 0x2D, Reset: 0x01, Name: POWER_CTL SELF TEST REGISTER Address: 0x2E, Reset: 0x00, Name: SELF_TEST RESET REGISTER Address: 0x2F, Reset: 0x00, Name: Reset RECOMMENDED SOLDERING PROFILE PCB FOOTPRINT PATTERN PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS BRANDING INFORMATION ORDERING GUIDE
2
ADXL355 digit al output features
00 5-
Digital serial peripheral interface (SPI)/I2C interfaces VSSIO VSS
1420
20-bit analog-to-digital converter (ADC)
Figure 1. ADXL354 Functional Block Diagram
Data interpolation routine for synchronous sampling V1P8ANA V V 1P8DIG DDIO Programmable high- and low-pass digital filters POWER Electromechanical self test LDO MANAGEMENT VSUPPLY LDO ADXL355 Integrated temperature sensor ADC INT1 Voltage range options CONTROL INT2 ANALOG ADC DIGITAL LOGIC V FILTER FILTER DRDY SUPPLY with internal regulators: 2.25 V to 3.6 V 3-AXIS ADC CS/SCL V SENSOR 1P8ANA, V1P8DIG with internal low dropout regulator (LDO) SCLK/VSSIO TEMP ADC FIFO SERIAL MOSI/SDA bypassed: 1.8 V typical ± 10% SENSOR I/O MISO/ASEL
1 -00
Operating temperature range: −40°C to +125°C V
205
SSIO VSS
14
14-terminal, 6 mm × 6 mm × 2.1 mm, LCC package,
Figure 2. ADXL355 Functional Block Diagram
0.26 grams APPLICATIONS Inertial measurement units (IMUs)/altitude and heading reference systems (AHRSs) Platform stabilization systems Structural health monitoring Seismic imaging Tilt sensing Robotics Condition monitoring GENERAL DESCRIPTION
The analog output ADXL354 and the digital output ADXL355 Highly integrated in a compact form factor, the low power are low noise density, low 0 g offset drift, low power, 3-axis ADXL355 is ideal in an Internet of Things (IoT) sensor node accelerometers with selectable measurement ranges. The and other wireless product designs. ADXL354B supports the ±2 g and ±4 g ranges, the ADXL354C The ADXL355 multifunction pin names may be referenced by supports the ±2 g and ±8 g ranges, and the ADXL355 supports their relevant function only for either the SPI or I2C interfaces. the ±2.048 g, ±4.096 g, and ±8.192 g ranges. The ADXL354/ ADXL355 offer industry leading noise, minimal offset drift over temperature, and long term stability enabling precision applications with minimal calibration. 1 Protected by U.S. Patents 8,472,270; 9,041,462; 8,665,627; 8,917,099; 6,892,576; 9,297,825; and 7,956,621.
Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ANALOG OUTPUT FOR THE ADXL354 DIGITAL OUTPUT FOR THE ADXL355 SPI DIGITAL INTERFACE CHARACTERISTICS FOR THE ADXL355 I2C DIGITAL INTERFACE CHARACTERISTICS FOR THE ADXL355 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS ROOT ALLAN VARIANCE (RAV) ADXL355 CHARACTERISTICS THEORY OF OPERATION ANALOG OUTPUT DIGITAL OUTPUT AXES OF ACCELERATION SENSITIVITY POWER SEQUENCING POWER SUPPLY DESCRIPTION VSUPPLY V1P8ANA V1P8DIG VDDIO OVERRANGE PROTECTION SELF TEST FILTER SERIAL COMMUNICATIONS SPI PROTOCOL I2C PROTOCOL READING ACCELERATION OR TEMPERATURE DATA FROM THE INTERFACE FIFO INTERRUPTS DATA_RDY DRDY PIN FIFO_FULL FIFO_OVR ACTIVITY NVM_BUSY EXTERNAL SYNCHRONIZATION AND INTERPOLATION EXT_SYNC = 00—No External Sync or Interpolation EXT_SYNC = 10—External Sync with Interpolation EXT_SYNC = 01—External Sync and External Clock ADXL355 REGISTER MAP REGISTER DEFINITIONS ANALOG DEVICES ID REGISTER Address: 0x00, Reset: 0xAD, Name: DEVID_AD ANALOG DEVICES MEMS ID REGISTER Address: 0x01, Reset: 0x1D, Name: DEVID_MST DEVICE ID REGISTER Address: 0x02, Reset: 0xED, Name: PARTID PRODUCT REVISION ID REGISTER Address: 0x03, Reset: 0x00, Name: REVID STATUS REGISTER Address: 0x04, Reset: 0x00, Name: STATUS FIFO ENTRIES REGISTER Address: 0x05, Reset: 0x00, Name: FIFO_ENTRIES TEMPERATURE DATA REGISTERS Address: 0x06, Reset: 0x00, Name: TEMP2 Address: 0x07, Reset: 0x00, Name: TEMP1 X-AXIS DATA REGISTERS Address: 0x08, Reset: 0x00, Name: XDATA3 Address: 0x09, Reset: 0x00, Name: XDATA2 Address: 0x0A, Reset: 0x00, Name: XDATA1 Y-AXIS DATA REGISTERS Address: 0x0B, Reset: 0x00, Name: YDATA3 Address: 0x0C, Reset: 0x00, Name: YDATA2 Address: 0x0D, Reset: 0x00, Name: YDATA1 Z-AXIS DATA REGISTERS Address: 0x0E, Reset: 0x00, Name: ZDATA3 Address: 0x0F, Reset: 0x00, Name: ZDATA2 Address: 0x10, Reset: 0x00, Name: ZDATA1 FIFO ACCESS REGISTER Address: 0x11, Reset: 0x00, Name: FIFO_DATA X-AXIS OFFSET TRIM REGISTERS Address: 0x1E, Reset: 0x00, Name: OFFSET_X_H Address: 0x1F, Reset: 0x00, Name: OFFSET_X_L Y-AXIS OFFSET TRIM REGISTERS Address: 0x20, Reset: 0x00, Name: OFFSET_Y_H Address: 0x21, Reset: 0x00, Name: OFFSET_Y_L Z-AXIS OFFSET TRIM REGISTERS Address: 0x22, Reset: 0x00, Name: OFFSET_Z_H Address: 0x23, Reset: 0x00, Name: OFFSET_Z_L ACTIVITY ENABLE REGISTER Address: 0x24, Reset: 0x00, Name: ACT_EN ACTIVITY THRESHOLD REGISTERS Address: 0x25, Reset: 0x00, Name: ACT_THRESH_H Address: 0x26, Reset: 0x00, Name: ACT_THRESH_L ACTIVITY COUNT REGISTER Address: 0x27, Reset: 0x01, Name: ACT_COUNT FILTER SETTINGS REGISTER Address: 0x28, Reset: 0x00, Name: Filter FIFO SAMPLES REGISTER Address: 0x29, Reset: 0x60, Name: FIFO_SAMPLES INTERRUPT PIN (INTx) FUNCTION MAP REGISTER Address: 0x2A, Reset: 0x00, Name: INT_MAP DATA SYNCHRONIZATION Address: 0x2B, Reset: 0x00, Name: Sync I2C SPEED, INTERRUPT POLARITY, AND RANGE REGISTER Address: 0x2C, Reset: 0x81, Name: Range POWER CONTROL REGISTER Address: 0x2D, Reset: 0x01, Name: POWER_CTL SELF TEST REGISTER Address: 0x2E, Reset: 0x00, Name: SELF_TEST RESET REGISTER Address: 0x2F, Reset: 0x00, Name: Reset RECOMMENDED SOLDERING PROFILE PCB FOOTPRINT PATTERN PACKAGING AND ORDERING INFORMATION OUTLINE DIMENSIONS BRANDING INFORMATION ORDERING GUIDE
