Datasheet ADIS16210 (Analog Devices) - 8

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Data Sheet ADIS16210 BASIC OPERATION
The ADIS16210 is an autonomous system that requires no user
READING SENSOR DATA
initialization. Upon receiving a valid power supply, it initializes A single register read requires two 16-bit SPI cycles. The first itself and starts sampling, processing, and loading data into the cycle requests the contents of a register using the bit assignments output registers. When using the factory default configuration, in Figure 9. The register contents then follow on DOUT, during DIO1 provides a data ready signal. The SPI interface enables the second sequence. simple integration with many embedded processor platforms, Figure 6 includes three single register reads in succession. In as shown in Figure 5 (electrical connection) and Table 6 (processor this example, the process starts with DIN = 0x0400 to request pin descriptions). the contents of the XACCL_OUT register, followed by 0x0600
3.3V
to request the contents of the YACCL_OUT register, and then
VDD
0x0800 to request the contents of the ZACCL_OUT register.
1 2
Full duplex operation enables processors to use the same 16-bit
SYSTEM PROCESSOR SS 14 CS ADIS16210 SPI MASTER
SPI cycle to read data from DOUT while requesting the next set
SCLK 13 SCLK
of data on DIN.
MOSI 11 DIN DIN MISO 12 DOUT 0x0400 0x0600 0x0800 IRQ 15 DIO1
-007
DOUT XACCL_OUT YACCL_OUT ZACCL_OUT
93 95
3 4 5 8
0 -006 Figure 6. SPI Read Example Remove 93 095 Figure 7 provides an example of four SPI signals when reading Figure 5. Electrical Connection Diagram PROD_ID in a repeating pattern.
Table 6. Generic Master Processor Pin Names and Functions CS Pin Name Function
SS Slave select
SCLK
IRQ Interrupt request, optional
DIN DIN = 0101 0110 0000 0000 = 0x5600
MOSI Master output, slave input
DOUT
8 MISO Master input, slave output 00 3-
DOUT = 0011 1111 0101 1100 = 0x3F52 = 16210
59 SCLK Serial clock 09 Figure 7. SPI Read Example, Second 16-Bit Sequence The ADIS16210 SPI interface supports full duplex serial commu-
DEVICE CONFIGURATION
nication (simultaneous transmit and receive) and uses the bit The user register map (see Table 8) provides a variety of control sequence shown in Figure 9. Table 7 provides a list of the most registers, which enable optimization for specific applications. common settings that initialize the serial port of a processor for the The SPI provides access to these registers, one byte at a time, ADIS16210 SPI interface. using the bit assignments shown in Figure 9. Each register has
Table 7. Generic Master Processor SPI Settings
16 bits, where Bits[7:0] represent the lower address and Bits[15:8]
Processor Setting Description
represent the upper address. Figure 8 displays the SPI signal Master ADIS16210 operates as a slave pattern for writing 0x07 to Address 0x38, which sets the number SCLK Rate ≤ 830 kHz Maximum serial clock rate of averages to 128 and the sample rate to 4 SPS. SPI Mode 3 CPOL = 1 (polarity), CPHA = 1 (phase)
CS
MSB-First Mode Bit sequence 16-Bit Mode Shift register/data length
SCLK DIN
9 00 93-
DIN = 1011 1000 0000 0111 = 0xB807, SET AVG_CNT[7:0] = 0x07
95 0 Figure 8. Example SPI Write Pattern
CS SCLK DIN R/W R/W A6 A5 A4 A3 A2 A1 A0 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0 A6 A5 DOUT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D15 D14 D13 NOTES 1. DOUT BITS ARE PRODUCED ONLY WHEN THE PREVIOUS 16-BIT DIN SEQUENCE STARTS WITH R/W = 0.
3 11
2. WHEN CS IS HIGH, DOUT IS IN A THREE-STATE, HIGH IMPEDANCE MODE, WHICH ALLOWS MULTIFUNCTIONAL USE OF THE LINE
3- 59
FOR OTHER DEVICES.
09 Figure 9. SPI Communication Bit Sequence Rev. C | Page 7 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS BASIC OPERATION READING SENSOR DATA DEVICE CONFIGURATION USER REGISTER MAP SENSOR DATA OUTPUT DATA REGISTERS Accelerometers Inclinometers Internal Temperature Power Supply SIGNAL PROCESSING, BIAS CORRECTION, AND ALIGNMENT Digital Filtering Accelerometer/Inclinometer Resolution Accelerometer Bias Correction Gravity Vector Axis Definition Measurement Mode Two-Axis Mode User Reference Alignment SYSTEM TOOLS GLOBAL COMMANDS Software Reset User Register Save to Flash Memory Flash Memory Test Self Test Power-Down INPUT/OUTPUT FUNCTIONS Data Ready Indicator Alarm Indicator General-Purpose Input/Output DEVICE IDENTIFICATION STATUS/ERROR FLAGS FLASH MEMORY MANAGEMENT ALARMS SYSTEM ALARM STATIC ALARMS DYNAMIC ALARMS ALARM REPORTING APPLICATIONS INFORMATION INTERFACE BOARD MATING CONNECTOR OUTLINE DIMENSIONS ORDERING GUIDE